<?xml version="1.0" encoding="ISO-8859-1" ?>
<?xml-stylesheet type="text/xsl" href="memorymap.xsl"?>
<datasheet>
  <header>SF2_MSS</header>
  <project-settings>
    <fam>SmartFusion2</fam>
    <die>M2S010</die>
    <package>400 VF</package>
    <speed-grade>STD</speed-grade>
    <voltage>1.2</voltage>
    <hdl-type>VHDL</hdl-type>
    <project-description>test design ${currdate} </project-description>
    <location>C:/Mchpprj/M2S010_PWM_Lab/component/work/SF2_MSS</location>
    <state>GENERATED ( Wed Mar 10 09:33:16 2021 )</state>
    <swide-toolchain>SoftConsole workspace generated to C:\Mchpprj\M2S010_PWM_Lab\SoftConsole</swide-toolchain>
  </project-settings>
  <site-map>
  </site-map>
  <memorysystem>
    <title>Memory Map for SF2_MSS</title>
    <description>The project contains the following subsystems:</description>
    <subsystems>
      <subsystem>
        <name>CM3</name>
        <master>CM3</master>
        <addressNames>
          <count>1</count>
          <name>
          </name>
        </addressNames>
        <slave>
          <name>DDR_0_SPACE_3</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xD000_0000</remapAddress>
          <fullAddressSpace>0xD000_0000 - 0xDFFF_FFFF</fullAddressSpace>
          <range>0x1000_0000</range>
        </slave>
        <slave>
          <name>DDR_0_SPACE_2</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xC000_0000</remapAddress>
          <fullAddressSpace>0xC000_0000 - 0xCFFF_FFFF</fullAddressSpace>
          <range>0x1000_0000</range>
        </slave>
        <slave>
          <name>DDR_0_SPACE_1</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xB000_0000</remapAddress>
          <fullAddressSpace>0xB000_0000 - 0xBFFF_FFFF</fullAddressSpace>
          <range>0x1000_0000</range>
        </slave>
        <slave>
          <name>DDR_0_SPACE_0</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xA000_0000</remapAddress>
          <fullAddressSpace>0xA000_0000 - 0xAFFF_FFFF</fullAddressSpace>
          <range>0x1000_0000</range>
        </slave>
        <slave>
          <name>AHB2ENVM1_REGISTERS</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x600C_0000</remapAddress>
          <fullAddressSpace>0x600C_0000 - 0x600F_FFFF</fullAddressSpace>
          <range>0x0004_0000</range>
        </slave>
        <slave>
          <name>AHB2ENVM0_REGISTERS</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x6008_0000</remapAddress>
          <fullAddressSpace>0x6008_0000 - 0x600B_FFFF</fullAddressSpace>
          <range>0x0004_0000</range>
        </slave>
        <slave>
          <name>ENTIRE_ENVM</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x6000_0000</remapAddress>
          <fullAddressSpace>0x6000_0000 - 0x6003_FFFF</fullAddressSpace>
          <range>0x0004_0000</range>
        </slave>
        <slave>
          <name>ENVM-ApplicationCode</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x6000_0000</remapAddress>
          <fullAddressSpace>0x6000_0000 - 0x6000_1DFF</fullAddressSpace>
          <range>0x1E00</range>
        </slave>
        <slave>
          <name>corepwm_0_0</name>
          <fullPinName>corepwm_0_0:APBslave</fullPinName>
          <remapAddress>0x5000_0000</remapAddress>
          <combinedAddressSpace>0x5000_0000 - 0x5000_0FFF</combinedAddressSpace>
          <remapAddress>0x3000_0000</remapAddress>
          <combinedAddressSpace>0x3000_0000 - 0x3000_0FFF</combinedAddressSpace>
          <range>0x0000_1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x100</range>
              <width format="long" id="width">8</width>
              <register>
                <name>PRESCALE</name>
                <addressOffset>0x00</addressOffset>
                <absoluteAddress>0x500000000</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x08</resetValue>
              </register>
              <register>
                <name>PERIOD</name>
                <addressOffset>0x04</addressOffset>
                <absoluteAddress>0x500000004</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x08</resetValue>
              </register>
              <register>
                <name>ENABLE_0_7</name>
                <addressOffset>0x08</addressOffset>
                <absoluteAddress>0x500000008</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>ENABLE_8_15</name>
                <addressOffset>0x0C</addressOffset>
                <absoluteAddress>0x50000000C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM1_POSEDGE</name>
                <addressOffset>0x10</addressOffset>
                <absoluteAddress>0x500000010</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM1_NEGEDGE_DACLEV</name>
                <addressOffset>0x14</addressOffset>
                <absoluteAddress>0x500000014</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM2_POSEDGE</name>
                <addressOffset>0x18</addressOffset>
                <absoluteAddress>0x500000018</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM2_NEGEDGE_DACLEV</name>
                <addressOffset>0x1C</addressOffset>
                <absoluteAddress>0x50000001C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM3_POSEDGE</name>
                <addressOffset>0x20</addressOffset>
                <absoluteAddress>0x500000020</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM3_NEGEDGE_DACLEV</name>
                <addressOffset>0x24</addressOffset>
                <absoluteAddress>0x500000024</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM4_POSEDGE</name>
                <addressOffset>0x28</addressOffset>
                <absoluteAddress>0x500000028</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM4_NEGEDGE_DACLEV</name>
                <addressOffset>0x2C</addressOffset>
                <absoluteAddress>0x50000002C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM5_POSEDGE</name>
                <addressOffset>0x30</addressOffset>
                <absoluteAddress>0x500000030</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM5_NEGEDGE_DACLEV</name>
                <addressOffset>0x34</addressOffset>
                <absoluteAddress>0x500000034</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM6_POSEDGE</name>
                <addressOffset>0x38</addressOffset>
                <absoluteAddress>0x500000038</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM6_NEGEDGE_DACLEV</name>
                <addressOffset>0x3C</addressOffset>
                <absoluteAddress>0x50000003C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM7_POSEDGE</name>
                <addressOffset>0x40</addressOffset>
                <absoluteAddress>0x500000040</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM7_NEGEDGE_DACLEV</name>
                <addressOffset>0x44</addressOffset>
                <absoluteAddress>0x500000044</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM8_POSEDGE</name>
                <addressOffset>0x48</addressOffset>
                <absoluteAddress>0x500000048</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM8_NEGEDGE_DACLEV</name>
                <addressOffset>0x4C</addressOffset>
                <absoluteAddress>0x50000004C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM9_POSEDGE</name>
                <addressOffset>0x50</addressOffset>
                <absoluteAddress>0x500000050</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM9_NEGEDGE_DACLEV</name>
                <addressOffset>0x54</addressOffset>
                <absoluteAddress>0x500000054</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM10_POSEDGE</name>
                <addressOffset>0x58</addressOffset>
                <absoluteAddress>0x500000058</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM10_NEGEDGE_DACLEV</name>
                <addressOffset>0x5C</addressOffset>
                <absoluteAddress>0x50000005C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM11_POSEDGE</name>
                <addressOffset>0x60</addressOffset>
                <absoluteAddress>0x500000060</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM11_NEGEDGE_DACLEV</name>
                <addressOffset>0x64</addressOffset>
                <absoluteAddress>0x500000064</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM12_POSEDGE</name>
                <addressOffset>0x68</addressOffset>
                <absoluteAddress>0x500000068</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM12_NEGEDGE_DACLEV</name>
                <addressOffset>0x6C</addressOffset>
                <absoluteAddress>0x50000006C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM13_POSEDGE</name>
                <addressOffset>0x70</addressOffset>
                <absoluteAddress>0x500000070</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM13_NEGEDGE_DACLEV</name>
                <addressOffset>0x74</addressOffset>
                <absoluteAddress>0x500000074</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM14_POSEDGE</name>
                <addressOffset>0x78</addressOffset>
                <absoluteAddress>0x500000078</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM14_NEGEDGE_DACLEV</name>
                <addressOffset>0x7C</addressOffset>
                <absoluteAddress>0x50000007C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM15_POSEDGE</name>
                <addressOffset>0x80</addressOffset>
                <absoluteAddress>0x500000080</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM15_NEGEDGE_DACLEV</name>
                <addressOffset>0x84</addressOffset>
                <absoluteAddress>0x500000084</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM16_POSEDGE</name>
                <addressOffset>0x88</addressOffset>
                <absoluteAddress>0x500000088</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM16_NEGEDGE_DACLEV</name>
                <addressOffset>0x8C</addressOffset>
                <absoluteAddress>0x50000008C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>PWM_STRETCH</name>
                <addressOffset>0x90</addressOffset>
                <absoluteAddress>0x500000090</absoluteAddress>
                <size>16</size>
                <access>R/W</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPRESCALE</name>
                <addressOffset>0x94</addressOffset>
                <absoluteAddress>0x500000094</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x00</resetValue>
              </register>
              <register>
                <name>TACHSTATUS</name>
                <addressOffset>0x98</addressOffset>
                <absoluteAddress>0x500000098</absoluteAddress>
                <size>16</size>
                <access>R/W</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHIRQMASK</name>
                <addressOffset>0x9C</addressOffset>
                <absoluteAddress>0x50000009C</absoluteAddress>
                <size>16</size>
                <access>R/W</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHMODE</name>
                <addressOffset>0xA0</addressOffset>
                <absoluteAddress>0x5000000A0</absoluteAddress>
                <size>16</size>
                <access>R/W</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_0</name>
                <addressOffset>0xA4</addressOffset>
                <absoluteAddress>0x5000000A4</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_1</name>
                <addressOffset>0xA8</addressOffset>
                <absoluteAddress>0x5000000A8</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_2</name>
                <addressOffset>0xAC</addressOffset>
                <absoluteAddress>0x5000000AC</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_3</name>
                <addressOffset>0xB0</addressOffset>
                <absoluteAddress>0x5000000B0</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_4</name>
                <addressOffset>0xB4</addressOffset>
                <absoluteAddress>0x5000000B4</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_5</name>
                <addressOffset>0xB8</addressOffset>
                <absoluteAddress>0x5000000B8</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_6</name>
                <addressOffset>0xBC</addressOffset>
                <absoluteAddress>0x5000000BC</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_7</name>
                <addressOffset>0xC0</addressOffset>
                <absoluteAddress>0x5000000C0</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_8</name>
                <addressOffset>0xC4</addressOffset>
                <absoluteAddress>0x5000000C4</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_9</name>
                <addressOffset>0xC8</addressOffset>
                <absoluteAddress>0x5000000C8</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_10</name>
                <addressOffset>0xCC</addressOffset>
                <absoluteAddress>0x5000000CC</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_11</name>
                <addressOffset>0xD0</addressOffset>
                <absoluteAddress>0x5000000D0</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_12</name>
                <addressOffset>0xD4</addressOffset>
                <absoluteAddress>0x5000000D4</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_13</name>
                <addressOffset>0xD8</addressOffset>
                <absoluteAddress>0x5000000D8</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_14</name>
                <addressOffset>0xDC</addressOffset>
                <absoluteAddress>0x5000000DC</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
              <register>
                <name>TACHPULSEDUR_15</name>
                <addressOffset>0xE0</addressOffset>
                <absoluteAddress>0x5000000E0</absoluteAddress>
                <size>16</size>
                <access>R</access>
                <resetValue>0x0000</resetValue>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>CACHE_BACKDOOR</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4040_0000</remapAddress>
          <fullAddressSpace>0x4040_0000 - 0x4040_FFFF</fullAddressSpace>
          <range>0x0001_0000</range>
        </slave>
        <slave>
          <name>SYSREG</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4003_8000</remapAddress>
          <fullAddressSpace>0x4003_8000 - 0x4003_8FFF</fullAddressSpace>
          <range>0x0000_1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>ESRAM_CR</name>
                <addressOffset>0x0</addressOffset>
                <absoluteAddress>0x400308000</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_CC_ERSAM1FWREMAP</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_CC_ESRAMFWREMAP</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ESRAM_MAX_LAT</name>
                <addressOffset>0x4</addressOffset>
                <absoluteAddress>0x400308004</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_MAX_LAT_ESRAM1</name>
                  <bitNumber>5:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_MAX_LAT_ESRAM0</name>
                  <bitNumber>2:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDR_CR</name>
                <addressOffset>0x8</addressOffset>
                <absoluteAddress>0x400308008</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_CC_DDRFWREMAP</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_CR</name>
                <addressOffset>0xC</addressOffset>
                <absoluteAddress>0x40030800C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ENVM_SENSE_ON</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ENVM_PERSIST</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NV_DPD1</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NV_DPD0</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NV_FREQRNG</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_ENVMREMAPSIZE</name>
                  <bitNumber>4:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_REMAP_BASE_CR</name>
                <addressOffset>0x10</addressOffset>
                <absoluteAddress>0x400308010</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_ENVMREMAPBASE</name>
                  <bitNumber>18:1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_ENVMREMAPENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_REMAP_FAB_CR</name>
                <addressOffset>0x14</addressOffset>
                <absoluteAddress>0x400308014</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_ENVMFABREMAPBASE</name>
                  <bitNumber>18:1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_ENVMFABREMAPENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_CR</name>
                <addressOffset>0x18</addressOffset>
                <absoluteAddress>0x400308018</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_CACHE_LOCK</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_SBUS_WR_MODE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_CACHE_ENB</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_REGION_CR</name>
                <addressOffset>0x1C</addressOffset>
                <absoluteAddress>0x40030801C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_CACHE_REGION</name>
                  <bitNumber>3:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_LOCK_BASE_ADDR_CR</name>
                <addressOffset>0x20</addressOffset>
                <absoluteAddress>0x400308020</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_LOCK_BASEADD</name>
                  <bitNumber>18:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_FLUSH_INDX_CR</name>
                <addressOffset>0x24</addressOffset>
                <absoluteAddress>0x400308024</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_FLUSH_INDEX</name>
                  <bitNumber>5:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_BUF_TIMER_CR</name>
                <addressOffset>0x28</addressOffset>
                <absoluteAddress>0x400308028</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_TIMER</name>
                  <bitNumber>9:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_NB_ADDR_CR</name>
                <addressOffset>0x2C</addressOffset>
                <absoluteAddress>0x40030802C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_NB_ADDR</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_NB_SIZE_CR</name>
                <addressOffset>0x30</addressOffset>
                <absoluteAddress>0x400308030</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_NB_SZ</name>
                  <bitNumber>3:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_CR</name>
                <addressOffset>0x34</addressOffset>
                <absoluteAddress>0x400308034</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDR_IDC_MAP</name>
                  <bitNumber>23:20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDR_SW_MAP</name>
                  <bitNumber>19:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDR_HPD_MAP</name>
                  <bitNumber>15:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDR_DS_MAP</name>
                  <bitNumber>11:8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDR_BUF_SZ</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_IDC_EN</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_SW_REN</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_SW_WEN</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_HPD_REN</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_HPD_WEN</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_DS_REN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_DS_WEN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>EDAC_CR</name>
                <addressOffset>0x38</addressOffset>
                <absoluteAddress>0x400308038</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CAN_EDAC_EN</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_EN</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_EN</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_EN</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_EN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_EN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MASTER_WEIGHT0_CR</name>
                <addressOffset>0x3C</addressOffset>
                <absoluteAddress>0x40030803C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_WEIGHT_PDMA</name>
                  <bitNumber>29:25</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_WEIGHT_FAB_1</name>
                  <bitNumber>24:20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_WEIGHT_FAB_0</name>
                  <bitNumber>19:15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_WEIGHT_GIGE</name>
                  <bitNumber>14:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_WEIGHT_S</name>
                  <bitNumber>9:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_WEIGHT_IC</name>
                  <bitNumber>4:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MASTER_WEIGHT1_CR</name>
                <addressOffset>0x40</addressOffset>
                <absoluteAddress>0x400308040</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_WEIGHT_G</name>
                  <bitNumber>14:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_WEIGHT_USB</name>
                  <bitNumber>9:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_WEIGHT_HPMDA</name>
                  <bitNumber>4:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SOFT_IRQ_CR</name>
                <addressOffset>0x44</addressOffset>
                <absoluteAddress>0x400308044</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SOFTINTERRUPT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SOFT_RESET_CR</name>
                <addressOffset>0x48</addressOffset>
                <absoluteAddress>0x400308048</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MDDR_DDRFIC_SOFTRESET</name>
                  <bitNumber>26</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MDDR_CTLR_SOFTRESET</name>
                  <bitNumber>25</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPOUT_31_24_SOFTRESET</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPOUT_23_16_SOFTRESET</name>
                  <bitNumber>23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPOUT_15_8_SOFTRESET</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPOUT_7_0_SOFTRESET</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPIO_SOFTRESET</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FIC_1_SOFTRESET</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FIC_0_SOFTRESET</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>HPDMA_SOFTRESET</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FPGA_SOFTRESET</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COMBLK_SOFTRESET</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_SOFTRESET</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CAN_SOFTRESET</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C1_SOFTRESET</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C0_SOFTRESET</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPI1_SOFTRESET</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPI0_SOFTRESET</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MMUART1_SOFTRESET</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MMUART0_SOFTRESET</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIMER_SOFTRESET</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PDMA_SOFTRESET</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_SOFTRESET</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_SOFTRESET</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_SOFTRESET</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ENVM1_SOFTRESET</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ENVM0_SOFTRESET</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>M3_CR</name>
                <addressOffset>0x4C</addressOffset>
                <absoluteAddress>0x40030804C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>M3_MPU_DISABLE</name>
                  <bitNumber>28</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STCLK_DIVISOR</name>
                  <bitNumber>27:26</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STCALIB</name>
                  <bitNumber>25:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_IF_CR</name>
                <addressOffset>0x50</addressOffset>
                <absoluteAddress>0x400308050</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_FIC_REG_SEL</name>
                  <bitNumber>9:4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB1_AHB_MODE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB0_AHB_MODE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB1_AHB_BYPASS</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB0_AHB_BYPASS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>LOOPBACK_CR</name>
                <addressOffset>0x54</addressOffset>
                <absoluteAddress>0x400308054</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MSS_GPIOLOOPBACK</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_I2CLOOPBACK</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_SPILOOPBACK</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_MMUARTLOOPBACK</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>GPIO_SYSRESET_SEL_CR</name>
                <addressOffset>0x58</addressOffset>
                <absoluteAddress>0x400308058</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MSS_GPIO_31_24_SYSRESET_SEL</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPIO_23_16_SYSRESET_SEL</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPIO_15_8_SYSRESET_SEL</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPIO_7_0_SYSRESET_SEL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>GPIN_SRC_SEL_CR</name>
                <addressOffset>0x5C</addressOffset>
                <absoluteAddress>0x40030805C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MSS_GPINSOURCE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MDDR_CR</name>
                <addressOffset>0x60</addressOffset>
                <absoluteAddress>0x400308060</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>PHY_SELF_REF_EN</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F_AXI_AHB_MODE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SDR_MODE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MDDR_CONFIG_LOCAL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USB_IO_INPUT_SEL_CR</name>
                <addressOffset>0x64</addressOffset>
                <absoluteAddress>0x400308064</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>USB_IO_INPUT_SEL</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>PERIPH_CLK_MUX_SEL_CR</name>
                <addressOffset>0x68</addressOffset>
                <absoluteAddress>0x400308068</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TRACECLK_DIV2_SEL</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPI1_SCK_FAB_SEL</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPI0_SCK_FAB_SEL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>WDOG_CR</name>
                <addressOffset>0x6C</addressOffset>
                <absoluteAddress>0x40030806C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>WDOGMODE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>WDOGENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MDDR_IO_CALIB_CR</name>
                <addressOffset>0x70</addressOffset>
                <absoluteAddress>0x400308070</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CALIB_LOCK</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CALIB_START</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CALIB_TRIM</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NCODE</name>
                  <bitNumber>11:6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PCODE</name>
                  <bitNumber>5:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>RESERVED</name>
                <addressOffset>0x74</addressOffset>
                <absoluteAddress>0x400308074</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
              </register>
              <register>
                <name>EDAC_IRQ_ENABLE_CR</name>
                <addressOffset>0x78</addressOffset>
                <absoluteAddress>0x400308078</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MDDR_ECC_INT_EN</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CAN_EDAC_2E_EN</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CAN_EDAC_1E_EN</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_2E_EN</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_1E_EN</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_2E_EN</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_1E_EN</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_2E_EN</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_1E_EN</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_2E_EN</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_1E_EN</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_2E_EN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_1E_EN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USB_CR</name>
                <addressOffset>0x7C</addressOffset>
                <absoluteAddress>0x40030807C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>USB_DDR_SELECT</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_UTMI_SEL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ESRAM_PIPELINE_CR</name>
                <addressOffset>0x80</addressOffset>
                <absoluteAddress>0x400308080</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ESRAM_PIPELINE_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSS_IRQ_ENABLE_CR</name>
                <addressOffset>0x84</addressOffset>
                <absoluteAddress>0x400308084</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_INTERRUPT_EN</name>
                  <bitNumber>19:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_INTERRUPT_EN</name>
                  <bitNumber>9:7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_INTERRUPT_EN</name>
                  <bitNumber>6:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>RTC_WAKEUP_CR</name>
                <addressOffset>0x88</addressOffset>
                <absoluteAddress>0x400308088</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>RTC_WAKEUP_C_EN</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTC_WAKEUP_FAB_EN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTC_WAKEUP_M3_EN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MAC_CR</name>
                <addressOffset>0x8C</addressOffset>
                <absoluteAddress>0x40030808C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>RGMII_TXC_DELAY_SEL</name>
                  <bitNumber>8:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ETH_PHY_MODE</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ETH_LINE_SPEED</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSSDDR_PLL_STATUS_LOW_CR</name>
                <addressOffset>0x90</addressOffset>
                <absoluteAddress>0x400308090</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FACC_PLL_LOCKCNT</name>
                  <bitNumber>29:26</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_LOCKWIN</name>
                  <bitNumber>25:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_RANGE</name>
                  <bitNumber>22:19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_DIVQ</name>
                  <bitNumber>19:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_DIVF</name>
                  <bitNumber>15:6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_DIVR</name>
                  <bitNumber>5:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSSDDR_PLL_STATUS_HIGH_CR</name>
                <addressOffset>0x94</addressOffset>
                <absoluteAddress>0x400308094</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FACC_PLL_SSMF</name>
                  <bitNumber>12:8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_SSMD</name>
                  <bitNumber>7:6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_SSE</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_PD</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_FSE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_MODE_3V3</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_MODE_1V2</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PLL_BYPASS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSSDDR_FACC1_CR</name>
                <addressOffset>0x98</addressOffset>
                <absoluteAddress>0x400308098</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FACC_FAB_REF_SEL</name>
                  <bitNumber>27</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CONTROLLER_PLLT_INT</name>
                  <bitNumber>26</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PERSIST_CC</name>
                  <bitNumber>25</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BASE_DIVISOR</name>
                  <bitNumber>24:22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDR_FIC_DIVISOR</name>
                  <bitNumber>21:19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FIC_1_DIVISOR</name>
                  <bitNumber>18:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FIC_0_DIVISOR</name>
                  <bitNumber>15:13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_GLMUX_SEL</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>M3_CLK_DIVISOR</name>
                  <bitNumber>11:9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDR_CLK_EN</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>APB1_DIVISOR</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>APB0_DIVISOR</name>
                  <bitNumber>4:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DIVISOR_A</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSSDDR_FACC2_CR</name>
                <addressOffset>0x9C</addressOffset>
                <absoluteAddress>0x40030809C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MSS_XTAL_RTC_EN</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_XTAL_EN</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_CLK_ENVM_EN</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_1MHZ_EN</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_25_50MHZ_EN</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_STANDBY_SEL</name>
                  <bitNumber>8:6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_PRE_SRC_SEL</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FACC_SRC_SEL</name>
                  <bitNumber>4:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTC_CLK_SEL</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>PLL_LOCK_EN_CR</name>
                <addressOffset>0xA0</addressOffset>
                <absoluteAddress>0x4003080A0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FAB_PLL_LOCK_LOST_EN</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_PLL_LOCK_EN</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MPLL_LOCK_LOST_EN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MPLL_LOCK_EN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSSDDR_CLK_CALIB_CR</name>
                <addressOffset>0xA4</addressOffset>
                <absoluteAddress>0x4003080A4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FAB_CALIB_START</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>PLL_DELAY_LINE_SEL_CR</name>
                <addressOffset>0xA8</addressOffset>
                <absoluteAddress>0x4003080A8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>PLL_REF_DEL_SEL</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MAC_STAT_CLRONRD_CR</name>
                <addressOffset>0xAC</addressOffset>
                <absoluteAddress>0x4003080AC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MAC_STAT_CLRONRD</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>RESET_SOURCE_CR</name>
                <addressOffset>0xB0</addressOffset>
                <absoluteAddress>0x4003080B0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>USER_M3_RESET_DETECT</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USER_RESET_DETECT</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>WDOG_RESET_DETECT</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>LOCKUP_RESET_DETECT</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SOFT_RESET_DETECT</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CONTROLLER_M3_RESET_DETECT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CONTROLLER_RESET_DETECT</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>P0_RESET_DETECT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_DC_ERR_ADDR_SR</name>
                <addressOffset>0xB4</addressOffset>
                <absoluteAddress>0x4003080B4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_DC_ERR_ADDR</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_IC_ERR_ADDR_SR</name>
                <addressOffset>0xB8</addressOffset>
                <absoluteAddress>0x4003080B8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_IC_ERR_ADDR</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_SB_ERR_ADDR_SR</name>
                <addressOffset>0xBC</addressOffset>
                <absoluteAddress>0x4003080BC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_SB_ERR_ADDR</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>RESERVED</name>
                <addressOffset>0xC0</addressOffset>
                <absoluteAddress>0x4003080C0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
              </register>
              <register>
                <name>CC_IC_MISS_CNTR_SR</name>
                <addressOffset>0xC4</addressOffset>
                <absoluteAddress>0x4003080C4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_IC_MISS_CNT</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_IC_HIT_CNTR_SR</name>
                <addressOffset>0xC8</addressOffset>
                <absoluteAddress>0x4003080C8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_IC_HIT_CNT</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_DC_MISS_CNTR_SR</name>
                <addressOffset>0xCC</addressOffset>
                <absoluteAddress>0x4003080CC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_DC_MISS_CNT</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_DC_HIT_CNTR_SR</name>
                <addressOffset>0xD0</addressOffset>
                <absoluteAddress>0x4003080D0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_DC_HIT_CNT</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_IC_TRANS_CNTR_SR</name>
                <addressOffset>0xD4</addressOffset>
                <absoluteAddress>0x4003080D4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_IC_TRANS_CNT</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_DC_TRANS_CNTR_SR</name>
                <addressOffset>0xD8</addressOffset>
                <absoluteAddress>0x4003080D8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_DC_TRANS_CNT</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_DS_ERR_ADR_SR</name>
                <addressOffset>0xDC</addressOffset>
                <absoluteAddress>0x4003080DC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_DS_ERR_ADD</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_HPD_ERR_ADR_SR</name>
                <addressOffset>0xE0</addressOffset>
                <absoluteAddress>0x4003080E0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_HPD_ERR_ADD</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_SW_ERR_ADDR_SR</name>
                <addressOffset>0xE4</addressOffset>
                <absoluteAddress>0x4003080E4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_SW_ERR_ADD</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_BUF_EMPTY_SR</name>
                <addressOffset>0xE8</addressOffset>
                <absoluteAddress>0x4003080E8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_IDC_RBEMPTY</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_HPD_RBEMPTY</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_HPD_WBEMPTY</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_SW_RBEMPTY</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_SW_EBEMPTY</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_DS_RBEMPTY</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_DS_WBEMPTY</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DDRB_DSBL_DN_SR</name>
                <addressOffset>0xEC</addressOffset>
                <absoluteAddress>0x4003080EC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_IDC_DSBL_DN</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_HPD_RDSBL_DN</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_HPD_WDSBL_DN</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_SW_RDSBL_DN</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_SW_WDSBL_DN</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_DS_RDSBL_DN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_DS_WDSBL_DN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ESRAM0_EDAC_CNT</name>
                <addressOffset>0xF0</addressOffset>
                <absoluteAddress>0x4003080F0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ESRAM0_EDAC_CNT_2E</name>
                  <bitNumber>31:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_CNT_1E</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ERAM1_EDDAC_CNT</name>
                <addressOffset>0xF4</addressOffset>
                <absoluteAddress>0x4003080F4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ESRAM1_EDAC_CNT_2E</name>
                  <bitNumber>31:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_CNT_1E</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CC_EDAC_CNT</name>
                <addressOffset>0xF8</addressOffset>
                <absoluteAddress>0x4003080F8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_EDAC_CNT_2E</name>
                  <bitNumber>31:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_EDAC_CNT_1E</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MAC_EDAC_TX_CNT</name>
                <addressOffset>0xFC</addressOffset>
                <absoluteAddress>0x4003080FC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MAC_EDAC_TX_CNT_2E</name>
                  <bitNumber>31:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_CNT_1E</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MAC_EDAC_RX_CNT</name>
                <addressOffset>0x100</addressOffset>
                <absoluteAddress>0x400308100</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MAC_EDAC_RX_CNT_2E</name>
                  <bitNumber>31:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_CNT_1E</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USB_EDAC_CNT</name>
                <addressOffset>0x104</addressOffset>
                <absoluteAddress>0x400308104</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>USB_EDAC_CNT_2E</name>
                  <bitNumber>31:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_CNT_1E</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CAN_EDAC_CNT</name>
                <addressOffset>0x108</addressOffset>
                <absoluteAddress>0x400308108</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CAN_EDAC_CNT_2E</name>
                  <bitNumber>31:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CAN_EDAC_CNT_1E</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ESRAM0_EDAC_ADR</name>
                <addressOffset>0x10C</addressOffset>
                <absoluteAddress>0x40030810C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ESRAM0_EDAC_2E_AD</name>
                  <bitNumber>25:13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_1E_AD</name>
                  <bitNumber>12:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ERSAM1_EDAC_ADR</name>
                <addressOffset>0x110</addressOffset>
                <absoluteAddress>0x400308110</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ESRAM1_EDAC_2E_AD</name>
                  <bitNumber>25:13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_1E_AD</name>
                  <bitNumber>12:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MAC_EDAC_RX_ADR</name>
                <addressOffset>0x114</addressOffset>
                <absoluteAddress>0x400308114</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MAC_EDAC_RX_2E_AD</name>
                  <bitNumber>25:13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_1E_AD</name>
                  <bitNumber>12:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MAC_EDAC_TX_ADR</name>
                <addressOffset>0x118</addressOffset>
                <absoluteAddress>0x400308118</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MAC_EDAC_TX_2E_AD</name>
                  <bitNumber>25:13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_1E_AD</name>
                  <bitNumber>12:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CAN_EDAC_ADR</name>
                <addressOffset>0x11C</addressOffset>
                <absoluteAddress>0x40030811C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CAN_EDAC_2E_AD</name>
                  <bitNumber>25:13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CAN_EDAC_1E_AD</name>
                  <bitNumber>12:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USB_EDAC_ADR</name>
                <addressOffset>0x120</addressOffset>
                <absoluteAddress>0x400308120</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>USB_EDAC_2E_AD</name>
                  <bitNumber>25:13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_1E_AD</name>
                  <bitNumber>12:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MM0_1_2_SECURITY</name>
                <addressOffset>0x124</addressOffset>
                <absoluteAddress>0x400308124</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MM0_1_2_MS6_ALLOWED_W</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS6_ALLOWED_R</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS3_ALLOWED_W</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS3_ALLOWED_R</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS2_ALLOWED_W</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS2_ALLOWED_R</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS1_ALLOWED_W</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS1_ALLOWED_R</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS0_ALLOWED_W</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM0_1_2_MS0_ALLOWED_R</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MM4_5_DDR_FIC_SECURITY/MM_4_5_FIC64_SECURITY</name>
                <addressOffset>0x128</addressOffset>
                <absoluteAddress>0x400308128</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MM4_5_DDR_FIC_MS6_ALLOWED_W</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS6_ALLOWED_R</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS3_ALLOWED_W</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS3_ALLOWED_R</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS2_ALLOWED_W</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS2_ALLOWED_R</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS1_ALLOWED_W</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS1_ALLOWED_R</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS0_ALLOWED_W</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM4_5_DDR_FIC_MS0_ALLOWED_R</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MM3_6_7_8_SECURITY</name>
                <addressOffset>0x12C</addressOffset>
                <absoluteAddress>0x40030812C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MM3_6_7_8_MS6_ALLOWED_W</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS6_ALLOWED_R</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS3_ALLOWED_W</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS3_ALLOWED_R</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS2_ALLOWED_W</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS2_ALLOWED_R</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS1_ALLOWED_W</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS1_ALLOWED_R</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS0_ALLOWED_W</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM3_6_7_8_MS0_ALLOWED_R</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MM9_SECURITY</name>
                <addressOffset>0x130</addressOffset>
                <absoluteAddress>0x400308130</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MM9_MS6_ALLOWED_W</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS6_ALLOWED_R</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS3_ALLOWED_W</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS3_ALLOWED_R</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS2_ALLOWED_W</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS2_ALLOWED_R</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS1_ALLOWED_W</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS1_ALLOWED_R</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS0_ALLOWED_W</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MM9_MS0_ALLOWED_R</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>M3_SR</name>
                <addressOffset>0x134</addressOffset>
                <absoluteAddress>0x400308134</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CURRPRI</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ETM_COUNT_LOW</name>
                <addressOffset>0x138</addressOffset>
                <absoluteAddress>0x400308138</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ETMCOUNT_31_0</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ETM_COUNT_HIGH</name>
                <addressOffset>0x13C</addressOffset>
                <absoluteAddress>0x40030813C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ETMINTSTAT</name>
                  <bitNumber>27:25</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ETMINTNUM</name>
                  <bitNumber>24:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ETMCOUNT_47_32</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DEVICE_SR</name>
                <addressOffset>0x140</addressOffset>
                <absoluteAddress>0x400308140</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>M3_DEBUG_ENABLE</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>M3_DISABLE</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FLASH_VALID_SYNC</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>WATCHDOG_FREEZE_SYNC</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FF_IN_PROGRESS_SYNC</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VIRGIN_PART</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CORE_UP_SYNC</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_PROTECT_USER</name>
                <addressOffset>0x144</addressOffset>
                <absoluteAddress>0x400308144</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>NVM1_UPPER_WRITE_ALLOWED</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM1_UPPER_OTHERS_ACCESS</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM1_UPPER_FABRIC_ACCESS</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM1_UPPER_M3ACCESS</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM1_LOWER_WRITE_ALLOWED</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM1_LOWER_OTHERS_ACCESS</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM1_LOWER_FABRIC_ACCESS</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM1_LOWER_M3ACCESS</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM0_UPPER_WRITE_ALLOWED</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM0_UPPER_OTHERS_ACCESS</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM0_UPPER_FABRIC_ACCESS</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM0_UPPER_M3ACCESS</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM0_LOWER_WRITE_ALLOWED</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM0_LOWER_OTHERS_ACCESS</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM0_LOWER_FABRIC_ACCESS</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>NVM0_LOWER_M3ACCESS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_STATUS</name>
                <addressOffset>0x148</addressOffset>
                <absoluteAddress>0x400308148</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CODE_SHADOW_EN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DEVICE_VERSION</name>
                <addressOffset>0x14C</addressOffset>
                <absoluteAddress>0x40030814C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>IDV</name>
                  <bitNumber>19:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>IDP</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSSDDR_PLL_STATUS</name>
                <addressOffset>0x150</addressOffset>
                <absoluteAddress>0x400308150</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>RCOSC_DIV2</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MPLL_LOCK</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_PLL_LOCK</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USB_SR</name>
                <addressOffset>0x154</addressOffset>
                <absoluteAddress>0x400308154</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>LPI_CARKIT_EN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>POWERDN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_SR</name>
                <addressOffset>0x158</addressOffset>
                <absoluteAddress>0x400308158</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ENVM_BUSY</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>RESERVED</name>
                <addressOffset>0x15C</addressOffset>
                <absoluteAddress>0x40030815C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
              </register>
              <register>
                <name>DDRB_STATUS</name>
                <addressOffset>0x160</addressOffset>
                <absoluteAddress>0x400308160</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_DEBUG_STATUS</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MDDR_IO_CALIB_STATUS</name>
                <addressOffset>0x164</addressOffset>
                <absoluteAddress>0x400308164</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CALIB_PCOMP</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CALIB_NCOMP</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CALIB_PCODE</name>
                  <bitNumber>12:6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CALIB_NCODE</name>
                  <bitNumber>5:1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CALIB_STATUS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSSDDR_CLK_CALIB_STATUS</name>
                <addressOffset>0x168</addressOffset>
                <absoluteAddress>0x400308168</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FAB_CALIB_FAIL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>WDOGLOAD</name>
                <addressOffset>0x16C</addressOffset>
                <absoluteAddress>0x40030816C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>WDOGLOAD</name>
                  <bitNumber>25:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>WDOGMVRP</name>
                <addressOffset>0x170</addressOffset>
                <absoluteAddress>0x400308170</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>WDOGMVRP</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USERCONFIG0</name>
                <addressOffset>0x174</addressOffset>
                <absoluteAddress>0x400308174</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CONFIG_REG0</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USERCONFIG1</name>
                <addressOffset>0x178</addressOffset>
                <absoluteAddress>0x400308178</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CONFIG_REG1</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USERCONFIG2</name>
                <addressOffset>0x17C</addressOffset>
                <absoluteAddress>0x40030817C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CONFIG_REG2</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>USERCONFIG3</name>
                <addressOffset>0x180</addressOffset>
                <absoluteAddress>0x400308180</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CONFIG_REG4</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_PROT_SIZE</name>
                <addressOffset>0x184</addressOffset>
                <absoluteAddress>0x400308184</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_PROTREGIONSIZE</name>
                  <bitNumber>5:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_PROT_BASE</name>
                <addressOffset>0x188</addressOffset>
                <absoluteAddress>0x400308188</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SW_PROTREGIONBASE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSS_GPIO_DEF</name>
                <addressOffset>0x18C</addressOffset>
                <absoluteAddress>0x40030818C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MSS_GPIO_31_24_DEF</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPIO_23_16_DEF</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPIO_15_8_DEF</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MSS_GPIO_7_0_DEF</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>EDAC_SR</name>
                <addressOffset>0x190</addressOffset>
                <absoluteAddress>0x400308190</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CAN_EDAC_2E</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CAN_EDAC_1E</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_2E</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_1E</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_2E</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_1E</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_2E</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_1E</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_2E</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_1E</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_2E</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_1E</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSS_INTERNAL_SR</name>
                <addressOffset>0x194</addressOffset>
                <absoluteAddress>0x400308194</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDR_FIC_INT</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MDDR_ECC_INT</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MDDR_IO_CALIB_INT</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_PLL_LOCKLOST_INT</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_PLL_LOCK_INT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MPLL_LOCKLOST_INT</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MPLL_LOCK_INT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MSS_EXTERNAL_SR</name>
                <addressOffset>0x198</addressOffset>
                <absoluteAddress>0x400308198</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_HRESP_ERR</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_LOCK_MID</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_LCKOUT</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_HPD_WR_ERR</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_SW_WR_ERR</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_DS_WR_ERR</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_RDWR_ERR_REG</name>
                  <bitNumber>12:7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SW_ERRORSTATUS</name>
                  <bitNumber>6:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>WDOGTIMEOUTEVENT</name>
                <addressOffset>0x19C</addressOffset>
                <absoluteAddress>0x40030819C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>WDOGTIMEOUTEVENT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CLR_MSS_COUNTERS</name>
                <addressOffset>0x1A0</addressOffset>
                <absoluteAddress>0x4003081A0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CC_DC_TRANS_CNTCLR</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_IC_TRANS_CNTCLR</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_DC_HIT_CNTCLR</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_DC_MISS_CNTCLR</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_IC_HIT_CNTCLR</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_IC_MISS_CNTCLR</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CLR_EDAC_COUNTERS</name>
                <addressOffset>0x1A4</addressOffset>
                <absoluteAddress>0x4003081A4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CAN_EDAC_CNTCLR_2E</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CAN_EDAC_CNTCLR_1E</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_CNTCLR_2E</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USB_EDAC_CNTCLR_1E</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_CNTCLR_2E</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_RX_CNTCLR_1E</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_CNTCLR_2E</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_EDAC_TX_CNTCLR_1E</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_CNTCLR_2E</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_EDAC_CNTCLR_1E</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_CNTCLR_2E</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_EDAC_CNTCLR_1E</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FLUSH_CR</name>
                <addressOffset>0x1A8</addressOffset>
                <absoluteAddress>0x4003081A8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DDRB_INVALID_IDC</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_INVALID_HPD</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_INVALID_SW</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_INVALID_DS</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_FLSHSW</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_FLSHHPD</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDRB_FLSHDS</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_FLUSH_CHLINE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CC_FLUSH_CACHE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MAC_STAT_CLR_CR</name>
                <addressOffset>0x1AC</addressOffset>
                <absoluteAddress>0x4003081AC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MAC_STAT_CLR</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>MSSFIC2TOFABRIC</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4002_0000</remapAddress>
          <fullAddressSpace>0x4002_0000 - 0x4003_7FFF</fullAddressSpace>
          <range>0x0001_8000</range>
        </slave>
        <slave>
          <name>RTC</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4001_7000</remapAddress>
          <fullAddressSpace>0x4001_7000 - 0x4001_7FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>COMBLK</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4001_6000</remapAddress>
          <fullAddressSpace>0x4001_6000 - 0x4001_6FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>HDMA</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4001_4000</remapAddress>
          <fullAddressSpace>0x4001_4000 - 0x4001_4FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>GPIO</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4001_3000</remapAddress>
          <fullAddressSpace>0x4001_3000 - 0x4001_3FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>H2FINTERRUPT</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4000_6000</remapAddress>
          <fullAddressSpace>0x4000_6000 - 0x4000_6FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>TIMER</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4000_4000</remapAddress>
          <fullAddressSpace>0x4000_4000 - 0x4000_4FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>MMUART_0</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x4000_0000</remapAddress>
          <fullAddressSpace>0x4000_0000 - 0x4000_0FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>RECYCLED_ESRAM1</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x2001_2000</remapAddress>
          <fullAddressSpace>0x2001_2000 - 0x2001_3FFF</fullAddressSpace>
          <range>0x0000_2000</range>
        </slave>
        <slave>
          <name>RECYCLED_ESRAM0</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x2001_0000</remapAddress>
          <fullAddressSpace>0x2001_0000 - 0x2001_1FFF</fullAddressSpace>
          <range>0x0000_2000</range>
        </slave>
        <slave>
          <name>ESRAM1</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x2000_8000</remapAddress>
          <fullAddressSpace>0x2000_8000 - 0x2000_FFFF</fullAddressSpace>
          <range>0x0000_8000</range>
        </slave>
        <slave>
          <name>ESRAM0</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x2000_0000</remapAddress>
          <fullAddressSpace>0x2000_0000 - 0x2000_7FFF</fullAddressSpace>
          <range>0x0000_8000</range>
        </slave>
      </subsystem>
    </subsystems>
  </memorysystem>
</datasheet>
