# Data Sheet: SF2_MSS

Project Settings

FAM: | SmartFusion2
Die: | M2S010
Package: | 400 VF
Speed Grade: | STD
Voltage: | 1.2
HDL: | VHDL
Project Description: | test design ${currdate}
Location: | C:/Mchpprj/M2S010_PWM_Lab/component/work/SF2_MSS
State (Time): | GENERATED ( Wed Mar 10 09:33:16 2021 )

Table of Contents
Generated Files
IO's
Hardware Instances
Firmware
Memory Map

Generated Files
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IO's
No IO's
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Cores
No Instances
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Firmware
No Firmware Generated. Design may not contain any processor subsystems, or firmware have not been downloaded to your vault
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Memory Map
The project contains the following subsystems:
- CM3
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## CM3 Subsystem

Master(s) on this bus:
- CM3

| Address Range
--- | ---
DDR_0_SPACE_3 | 0xD000_0000 - 0xDFFF_FFFF
DDR_0_SPACE_2 | 0xC000_0000 - 0xCFFF_FFFF
DDR_0_SPACE_1 | 0xB000_0000 - 0xBFFF_FFFF
DDR_0_SPACE_0 | 0xA000_0000 - 0xAFFF_FFFF
AHB2ENVM1_REGISTERS | 0x600C_0000 - 0x600F_FFFF
AHB2ENVM0_REGISTERS | 0x6008_0000 - 0x600B_FFFF
ENTIRE_ENVM | 0x6000_0000 - 0x6003_FFFF
ENVM-ApplicationCode | 0x6000_0000 - 0x6000_1DFF
corepwm_0_0 : RegisterMap | 0x5000_0000 - 0x5000_0FFF 0x3000_0000 - 0x3000_0FFF
CACHE_BACKDOOR | 0x4040_0000 - 0x4040_FFFF
SYSREG : RegisterMap | 0x4003_8000 - 0x4003_8FFF
MSSFIC2TOFABRIC | 0x4002_0000 - 0x4003_7FFF
RTC | 0x4001_7000 - 0x4001_7FFF
COMBLK | 0x4001_6000 - 0x4001_6FFF
HDMA | 0x4001_4000 - 0x4001_4FFF
GPIO | 0x4001_3000 - 0x4001_3FFF
H2FINTERRUPT | 0x4000_6000 - 0x4000_6FFF
TIMER | 0x4000_4000 - 0x4000_4FFF
MMUART_0 | 0x4000_0000 - 0x4000_0FFF
RECYCLED_ESRAM1 | 0x2001_2000 - 0x2001_3FFF
RECYCLED_ESRAM0 | 0x2001_0000 - 0x2001_1FFF
ESRAM1 | 0x2000_8000 - 0x2000_FFFF
ESRAM0 | 0x2000_0000 - 0x2000_7FFF

subsystem list, top of page

### DDR_0_SPACE_3 : Memory Map [ 0xD000_0000 - 0xDFFF_FFFF ]

range: 0x1000_0000
back to CM3 Memory Map

### DDR_0_SPACE_2 : Memory Map [ 0xC000_0000 - 0xCFFF_FFFF ]

range: 0x1000_0000
back to CM3 Memory Map

### DDR_0_SPACE_1 : Memory Map [ 0xB000_0000 - 0xBFFF_FFFF ]

range: 0x1000_0000
back to CM3 Memory Map

### DDR_0_SPACE_0 : Memory Map [ 0xA000_0000 - 0xAFFF_FFFF ]

range: 0x1000_0000
back to CM3 Memory Map

### AHB2ENVM1_REGISTERS : Memory Map [ 0x600C_0000 - 0x600F_FFFF ]

range: 0x0004_0000
back to CM3 Memory Map

### AHB2ENVM0_REGISTERS : Memory Map [ 0x6008_0000 - 0x600B_FFFF ]

range: 0x0004_0000
back to CM3 Memory Map

### ENTIRE_ENVM : Memory Map [ 0x6000_0000 - 0x6003_FFFF ]

range: 0x0004_0000
back to CM3 Memory Map

### ENVM-ApplicationCode : Memory Map [ 0x6000_0000 - 0x6000_1DFF ]

range: 0x1E00
back to CM3 Memory Map

### corepwm_0_0 : RegisterMap Memory Map [
0x5000_0000 - 0x5000_0FFF
0x3000_0000 - 0x3000_0FFF ]

range: 0x0000_1000

Address | Name | R/W | Width | Reset Value | Description
--- | --- | --- | --- | --- | ---
0x500000000 | PRESCALE | R/W | 8 | 0x08 |
0x500000004 | PERIOD | R/W | 8 | 0x08 |
0x500000008 | ENABLE_0_7 | R/W | 8 | 0x00 |
0x50000000C | ENABLE_8_15 | R/W | 8 | 0x00 |
0x500000010 | PWM1_POSEDGE | R/W | 8 | 0x00 |
0x500000014 | PWM1_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000018 | PWM2_POSEDGE | R/W | 8 | 0x00 |
0x50000001C | PWM2_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000020 | PWM3_POSEDGE | R/W | 8 | 0x00 |
0x500000024 | PWM3_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000028 | PWM4_POSEDGE | R/W | 8 | 0x00 |
0x50000002C | PWM4_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000030 | PWM5_POSEDGE | R/W | 8 | 0x00 |
0x500000034 | PWM5_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000038 | PWM6_POSEDGE | R/W | 8 | 0x00 |
0x50000003C | PWM6_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000040 | PWM7_POSEDGE | R/W | 8 | 0x00 |
0x500000044 | PWM7_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000048 | PWM8_POSEDGE | R/W | 8 | 0x00 |
0x50000004C | PWM8_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000050 | PWM9_POSEDGE | R/W | 8 | 0x00 |
0x500000054 | PWM9_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000058 | PWM10_POSEDGE | R/W | 8 | 0x00 |
0x50000005C | PWM10_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000060 | PWM11_POSEDGE | R/W | 8 | 0x00 |
0x500000064 | PWM11_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000068 | PWM12_POSEDGE | R/W | 8 | 0x00 |
0x50000006C | PWM12_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000070 | PWM13_POSEDGE | R/W | 8 | 0x00 |
0x500000074 | PWM13_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000078 | PWM14_POSEDGE | R/W | 8 | 0x00 |
0x50000007C | PWM14_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000080 | PWM15_POSEDGE | R/W | 8 | 0x00 |
0x500000084 | PWM15_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000088 | PWM16_POSEDGE | R/W | 8 | 0x00 |
0x50000008C | PWM16_NEGEDGE_DACLEV | R/W | 8 | 0x00 |
0x500000090 | PWM_STRETCH | R/W | 16 | 0x0000 |
0x500000094 | TACHPRESCALE | R/W | 8 | 0x00 |
0x500000098 | TACHSTATUS | R/W | 16 | 0x0000 |
0x50000009C | TACHIRQMASK | R/W | 16 | 0x0000 |
0x5000000A0 | TACHMODE | R/W | 16 | 0x0000 |
0x5000000A4 | TACHPULSEDUR_0 | R | 16 | 0x0000 |
0x5000000A8 | TACHPULSEDUR_1 | R | 16 | 0x0000 |
0x5000000AC | TACHPULSEDUR_2 | R | 16 | 0x0000 |
0x5000000B0 | TACHPULSEDUR_3 | R | 16 | 0x0000 |
0x5000000B4 | TACHPULSEDUR_4 | R | 16 | 0x0000 |
0x5000000B8 | TACHPULSEDUR_5 | R | 16 | 0x0000 |
0x5000000BC | TACHPULSEDUR_6 | R | 16 | 0x0000 |
0x5000000C0 | TACHPULSEDUR_7 | R | 16 | 0x0000 |
0x5000000C4 | TACHPULSEDUR_8 | R | 16 | 0x0000 |
0x5000000C8 | TACHPULSEDUR_9 | R | 16 | 0x0000 |
0x5000000CC | TACHPULSEDUR_10 | R | 16 | 0x0000 |
0x5000000D0 | TACHPULSEDUR_11 | R | 16 | 0x0000 |
0x5000000D4 | TACHPULSEDUR_12 | R | 16 | 0x0000 |
0x5000000D8 | TACHPULSEDUR_13 | R | 16 | 0x0000 |
0x5000000DC | TACHPULSEDUR_14 | R | 16 | 0x0000 |
0x5000000E0 | TACHPULSEDUR_15 | R | 16 | 0x0000 |

back to CM3 Memory Map

### CACHE_BACKDOOR : Memory Map [ 0x4040_0000 - 0x4040_FFFF ]

range: 0x0001_0000
back to CM3 Memory Map

### SYSREG : RegisterMap Memory Map [ 0x4003_8000 - 0x4003_8FFF ]

range: 0x0000_1000

Address | Name | R/W | Width | Reset Value | Description
--- | --- | --- | --- | --- | ---
0x400308000 | ESRAM_CR | R/W | 32 | 0x0 |
0x400308004 | ESRAM_MAX_LAT | R/W | 32 | 0x0 |
0x400308008 | DDR_CR | R/W | 32 | 0x0 |
0x40030800C | ENVM_CR | R/W | 32 | 0x0 |
0x400308010 | ENVM_REMAP_BASE_CR | R/W | 32 | 0x0 |
0x400308014 | ENVM_REMAP_FAB_CR | R/W | 32 | 0x0 |
0x400308018 | CC_CR | R/W | 32 | 0x0 |
0x40030801C | CC_REGION_CR | R/W | 32 | 0x0 |
0x400308020 | CC_LOCK_BASE_ADDR_CR | R/W | 32 | 0x0 |
0x400308024 | CC_FLUSH_INDX_CR | R/W | 32 | 0x0 |
0x400308028 | DDRB_BUF_TIMER_CR | R/W | 32 | 0x0 |
0x40030802C | DDRB_NB_ADDR_CR | R/W | 32 | 0x0 |
0x400308030 | DDRB_NB_SIZE_CR | R/W | 32 | 0x0 |
0x400308034 | DDRB_CR | R/W | 32 | 0x0 |
0x400308038 | EDAC_CR | R/W | 32 | 0x0 |
0x40030803C | MASTER_WEIGHT0_CR | R/W | 32 | 0x0 |
0x400308040 | MASTER_WEIGHT1_CR | R/W | 32 | 0x0 |
0x400308044 | SOFT_IRQ_CR | R/W | 32 | 0x0 |
0x400308048 | SOFT_RESET_CR | R/W | 32 | 0x0 |
0x40030804C | M3_CR | R/W | 32 | 0x0 |
0x400308050 | FAB_IF_CR | R/W | 32 | 0x0 |
0x400308054 | LOOPBACK_CR | R/W | 32 | 0x0 |
0x400308058 | GPIO_SYSRESET_SEL_CR | R/W | 32 | 0x0 |
0x40030805C | GPIN_SRC_SEL_CR | R/W | 32 | 0x0 |
0x400308060 | MDDR_CR | R/W | 32 | 0x0 |
0x400308064 | USB_IO_INPUT_SEL_CR | R/W | 32 | 0x0 |
0x400308068 | PERIPH_CLK_MUX_SEL_CR | R/W | 32 | 0x0 |
0x40030806C | WDOG_CR | R/W | 32 | 0x0 |
0x400308070 | MDDR_IO_CALIB_CR | R/W | 32 | 0x0 |
0x400308074 | RESERVED | R/W | 32 | 0x0 |
0x400308078 | EDAC_IRQ_ENABLE_CR | R/W | 32 | 0x0 |
0x40030807C | USB_CR | R/W | 32 | 0x0 |
0x400308080 | ESRAM_PIPELINE_CR | R/W | 32 | 0x0 |
0x400308084 | MSS_IRQ_ENABLE_CR | R/W | 32 | 0x0 |
0x400308088 | RTC_WAKEUP_CR | R/W | 32 | 0x0 |
0x40030808C | MAC_CR | R/W | 32 | 0x0 |
0x400308090 | MSSDDR_PLL_STATUS_LOW_CR | R/W | 32 | 0x0 |
0x400308094 | MSSDDR_PLL_STATUS_HIGH_CR | R/W | 32 | 0x0 |
0x400308098 | MSSDDR_FACC1_CR | R/W | 32 | 0x0 |
0x40030809C | MSSDDR_FACC2_CR | R/W | 32 | 0x0 |
0x4003080A0 | PLL_LOCK_EN_CR | R/W | 32 | 0x0 |
0x4003080A4 | MSSDDR_CLK_CALIB_CR | R/W | 32 | 0x0 |
0x4003080A8 | PLL_DELAY_LINE_SEL_CR | R/W | 32 | 0x0 |
0x4003080AC | MAC_STAT_CLRONRD_CR | R/W | 32 | 0x0 |
0x4003080B0 | RESET_SOURCE_CR | R/W | 32 | 0x0 |
0x4003080B4 | CC_DC_ERR_ADDR_SR | R/W | 32 | 0x0 |
0x4003080B8 | CC_IC_ERR_ADDR_SR | R/W | 32 | 0x0 |
0x4003080BC | CC_SB_ERR_ADDR_SR | R/W | 32 | 0x0 |
0x4003080C0 | RESERVED | R/W | 32 | 0x0 |
0x4003080C4 | CC_IC_MISS_CNTR_SR | R/W | 32 | 0x0 |
0x4003080C8 | CC_IC_HIT_CNTR_SR | R/W | 32 | 0x0 |
0x4003080CC | CC_DC_MISS_CNTR_SR | R/W | 32 | 0x0 |
0x4003080D0 | CC_DC_HIT_CNTR_SR | R/W | 32 | 0x0 |
0x4003080D4 | CC_IC_TRANS_CNTR_SR | R/W | 32 | 0x0 |
0x4003080D8 | CC_DC_TRANS_CNTR_SR | R/W | 32 | 0x0 |
0x4003080DC | DDRB_DS_ERR_ADR_SR | R/W | 32 | 0x0 |
0x4003080E0 | DDRB_HPD_ERR_ADR_SR | R/W | 32 | 0x0 |
0x4003080E4 | DDRB_SW_ERR_ADDR_SR | R/W | 32 | 0x0 |
0x4003080E8 | DDRB_BUF_EMPTY_SR | R/W | 32 | 0x0 |
0x4003080EC | DDRB_DSBL_DN_SR | R/W | 32 | 0x0 |
0x4003080F0 | ESRAM0_EDAC_CNT | R/W | 32 | 0x0 |
0x4003080F4 | ERAM1_EDDAC_CNT | R/W | 32 | 0x0 |
0x4003080F8 | CC_EDAC_CNT | R/W | 32 | 0x0 |
0x4003080FC | MAC_EDAC_TX_CNT | R/W | 32 | 0x0 |
0x400308100 | MAC_EDAC_RX_CNT | R/W | 32 | 0x0 |
0x400308104 | USB_EDAC_CNT | R/W | 32 | 0x0 |
0x400308108 | CAN_EDAC_CNT | R/W | 32 | 0x0 |
0x40030810C | ESRAM0_EDAC_ADR | R/W | 32 | 0x0 |
0x400308110 | ERSAM1_EDAC_ADR | R/W | 32 | 0x0 |
0x400308114 | MAC_EDAC_RX_ADR | R/W | 32 | 0x0 |
0x400308118 | MAC_EDAC_TX_ADR | R/W | 32 | 0x0 |
0x40030811C | CAN_EDAC_ADR | R/W | 32 | 0x0 |
0x400308120 | USB_EDAC_ADR | R/W | 32 | 0x0 |
0x400308124 | MM0_1_2_SECURITY | R/W | 32 | 0x0 |
0x400308128 | MM4_5_DDR_FIC_SECURITY/MM_4_5_FIC64_SECURITY | R/W | 32 | 0x0 |
0x40030812C | MM3_6_7_8_SECURITY | R/W | 32 | 0x0 |
0x400308130 | MM9_SECURITY | R/W | 32 | 0x0 |
0x400308134 | M3_SR | R/W | 32 | 0x0 |
0x400308138 | ETM_COUNT_LOW | R/W | 32 | 0x0 |
0x40030813C | ETM_COUNT_HIGH | R/W | 32 | 0x0 |
0x400308140 | DEVICE_SR | R/W | 32 | 0x0 |
0x400308144 | ENVM_PROTECT_USER | R/W | 32 | 0x0 |
0x400308148 | ENVM_STATUS | R/W | 32 | 0x0 |
0x40030814C | DEVICE_VERSION | R/W | 32 | 0x0 |
0x400308150 | MSSDDR_PLL_STATUS | R/W | 32 | 0x0 |
0x400308154 | USB_SR | R/W | 32 | 0x0 |
0x400308158 | ENVM_SR | R/W | 32 | 0x0 |
0x40030815C | RESERVED | R/W | 32 | 0x0 |
0x400308160 | DDRB_STATUS | R/W | 32 | 0x0 |
0x400308164 | MDDR_IO_CALIB_STATUS | R/W | 32 | 0x0 |
0x400308168 | MSSDDR_CLK_CALIB_STATUS | R/W | 32 | 0x0 |
0x40030816C | WDOGLOAD | R/W | 32 | 0x0 |
0x400308170 | WDOGMVRP | R/W | 32 | 0x0 |
0x400308174 | USERCONFIG0 | R/W | 32 | 0x0 |
0x400308178 | USERCONFIG1 | R/W | 32 | 0x0 |
0x40030817C | USERCONFIG2 | R/W | 32 | 0x0 |
0x400308180 | USERCONFIG3 | R/W | 32 | 0x0 |
0x400308184 | FAB_PROT_SIZE | R/W | 32 | 0x0 |
0x400308188 | FAB_PROT_BASE | R/W | 32 | 0x0 |
0x40030818C | MSS_GPIO_DEF | R/W | 32 | 0x0 |
0x400308190 | EDAC_SR | R/W | 32 | 0x0 |
0x400308194 | MSS_INTERNAL_SR | R/W | 32 | 0x0 |
0x400308198 | MSS_EXTERNAL_SR | R/W | 32 | 0x0 |
0x40030819C | WDOGTIMEOUTEVENT | R/W | 32 | 0x0 |
0x4003081A0 | CLR_MSS_COUNTERS | R/W | 32 | 0x0 |
0x4003081A4 | CLR_EDAC_COUNTERS | R/W | 32 | 0x0 |
0x4003081A8 | FLUSH_CR | R/W | 32 | 0x0 |
0x4003081AC | MAC_STAT_CLR_CR | R/W | 32 | 0x0 |

back to CM3 Memory Map

#### ESRAM_CR register details [ 0x400308000 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
1 | SW_CC_ERSAM1FWREMAP | R/W |
0 | SW_CC_ESRAMFWREMAP | R/W |

back to SYSREG Registers

#### ESRAM_MAX_LAT register details [ 0x400308004 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
5:3 | SW_MAX_LAT_ESRAM1 | R/W |
2:0 | SW_MAX_LAT_ESRAM0 | R/W |

back to SYSREG Registers

#### DDR_CR register details [ 0x400308008 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
0 | SW_CC_DDRFWREMAP | R/W |

back to SYSREG Registers

#### ENVM_CR register details [ 0x40030800C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
16 | ENVM_SENSE_ON | R/W |
15 | ENVM_PERSIST | R/W |
14 | NV_DPD1 | R/W |
13 | NV_DPD0 | R/W |
7:5 | NV_FREQRNG | R/W |
4:0 | SW_ENVMREMAPSIZE | R/W |

back to SYSREG Registers

#### ENVM_REMAP_BASE_CR register details [ 0x400308010 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
18:1 | SW_ENVMREMAPBASE | R/W |
0 | SW_ENVMREMAPENABLE | R/W |

back to SYSREG Registers

#### ENVM_REMAP_FAB_CR register details [ 0x400308014 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
18:1 | SW_ENVMFABREMAPBASE | R/W |
0 | SW_ENVMFABREMAPENABLE | R/W |

back to SYSREG Registers

#### CC_CR register details [ 0x400308018 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
2 | CC_CACHE_LOCK | R/W |
1 | CC_SBUS_WR_MODE | R/W |
0 | CC_CACHE_ENB | R/W |

back to SYSREG Registers

#### CC_REGION_CR register details [ 0x40030801C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
3:0 | CC_CACHE_REGION | R/W |

back to SYSREG Registers

#### CC_LOCK_BASE_ADDR_CR register details [ 0x400308020 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
18:0 | CC_LOCK_BASEADD | R/W |

back to SYSREG Registers

#### CC_FLUSH_INDX_CR register details [ 0x400308024 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
5:0 | CC_FLUSH_INDEX | R/W |

back to SYSREG Registers

#### DDRB_BUF_TIMER_CR register details [ 0x400308028 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
9:0 | DDRB_TIMER | R/W |

back to SYSREG Registers

#### DDRB_NB_ADDR_CR register details [ 0x40030802C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
15:0 | DDRB_NB_ADDR | R/W |

back to SYSREG Registers

#### DDRB_NB_SIZE_CR register details [ 0x400308030 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
3:0 | DDRB_NB_SZ | R/W |

back to SYSREG Registers

#### DDRB_CR register details [ 0x400308034 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
23:20 | DDR_IDC_MAP | R/W |
19:16 | DDR_SW_MAP | R/W |
15:12 | DDR_HPD_MAP | R/W |
11:8 | DDR_DS_MAP | R/W |
7 | DDR_BUF_SZ | R/W |
6 | DDRB_IDC_EN | R/W |
5 | DDRB_SW_REN | R/W |
4 | DDRB_SW_WEN | R/W |
3 | DDRB_HPD_REN | R/W |
2 | DDRB_HPD_WEN | R/W |
1 | DDRB_DS_REN | R/W |
0 | DDRB_DS_WEN | R/W |

back to SYSREG Registers

#### EDAC_CR register details [ 0x400308038 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
6 | CAN_EDAC_EN | R/W |
5 | USB_EDAC_EN | R/W |
4 | MAC_EDAC_RX_EN | R/W |
3 | MAC_EDAC_TX_EN | R/W |
1 | ESRAM1_EDAC_EN | R/W |
0 | ESRAM0_EDAC_EN | R/W |

back to SYSREG Registers

#### MASTER_WEIGHT0_CR register details [ 0x40030803C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
29:25 | SW_WEIGHT_PDMA | R/W |
24:20 | SW_WEIGHT_FAB_1 | R/W |
19:15 | SW_WEIGHT_FAB_0 | R/W |
14:10 | SW_WEIGHT_GIGE | R/W |
9:5 | SW_WEIGHT_S | R/W |
4:0 | SW_WEIGHT_IC | R/W |

back to SYSREG Registers

#### MASTER_WEIGHT1_CR register details [ 0x400308040 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
14:10 | SW_WEIGHT_G | R/W |
9:5 | SW_WEIGHT_USB | R/W |
4:0 | SW_WEIGHT_HPMDA | R/W |

back to SYSREG Registers

#### SOFT_IRQ_CR register details [ 0x400308044 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
0 | SOFTINTERRUPT | R/W |

back to SYSREG Registers

#### SOFT_RESET_CR register details [ 0x400308048 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
26 | MDDR_DDRFIC_SOFTRESET | R/W |
25 | MDDR_CTLR_SOFTRESET | R/W |
24 | MSS_GPOUT_31_24_SOFTRESET | R/W |
23 | MSS_GPOUT_23_16_SOFTRESET | R/W |
22 | MSS_GPOUT_15_8_SOFTRESET | R/W |
21 | MSS_GPOUT_7_0_SOFTRESET | R/W |
20 | MSS_GPIO_SOFTRESET | R/W |
19 | FIC_1_SOFTRESET | R/W |
18 | FIC_0_SOFTRESET | R/W |
17 | HPDMA_SOFTRESET | R/W |
16 | FPGA_SOFTRESET | R/W |
15 | COMBLK_SOFTRESET | R/W |
14 | USB_SOFTRESET | R/W |
13 | CAN_SOFTRESET | R/W |
12 | I2C1_SOFTRESET | R/W |
11 | I2C0_SOFTRESET | R/W |
10 | SPI1_SOFTRESET | R/W |
9 | SPI0_SOFTRESET | R/W |
8 | MMUART1_SOFTRESET | R/W |
7 | MMUART0_SOFTRESET | R/W |
6 | TIMER_SOFTRESET | R/W |
5 | PDMA_SOFTRESET | R/W |
4 | MAC_SOFTRESET | R/W |
3 | ESRAM1_SOFTRESET | R/W |
2 | ESRAM0_SOFTRESET | R/W |
1 | ENVM1_SOFTRESET | R/W |
0 | ENVM0_SOFTRESET | R/W |

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#### M3_CR register details [ 0x40030804C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
28 | M3_MPU_DISABLE | R/W |
27:26 | STCLK_DIVISOR | R/W |
25:0 | STCALIB | R/W |

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#### FAB_IF_CR register details [ 0x400308050 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
9:4 | SW_FIC_REG_SEL | R/W |
3 | FAB1_AHB_MODE | R/W |
2 | FAB0_AHB_MODE | R/W |
1 | FAB1_AHB_BYPASS | R/W |
0 | FAB0_AHB_BYPASS | R/W |

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#### LOOPBACK_CR register details [ 0x400308054 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
3 | MSS_GPIOLOOPBACK | R/W |
2 | MSS_I2CLOOPBACK | R/W |
1 | MSS_SPILOOPBACK | R/W |
0 | MSS_MMUARTLOOPBACK | R/W |

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#### GPIO_SYSRESET_SEL_CR register details [ 0x400308058 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
3 | MSS_GPIO_31_24_SYSRESET_SEL | R/W |
2 | MSS_GPIO_23_16_SYSRESET_SEL | R/W |
1 | MSS_GPIO_15_8_SYSRESET_SEL | R/W |
0 | MSS_GPIO_7_0_SYSRESET_SEL | R/W |

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#### GPIN_SRC_SEL_CR register details [ 0x40030805C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | MSS_GPINSOURCE | R/W |

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#### MDDR_CR register details [ 0x400308060 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
3 | PHY_SELF_REF_EN | R/W |
2 | F_AXI_AHB_MODE | R/W |
1 | SDR_MODE | R/W |
0 | MDDR_CONFIG_LOCAL | R/W |

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#### USB_IO_INPUT_SEL_CR register details [ 0x400308064 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
1:0 | USB_IO_INPUT_SEL | R/W |

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#### PERIPH_CLK_MUX_SEL_CR register details [ 0x400308068 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
2 | TRACECLK_DIV2_SEL | R/W |
1 | SPI1_SCK_FAB_SEL | R/W |
0 | SPI0_SCK_FAB_SEL | R/W |

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#### WDOG_CR register details [ 0x40030806C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
1 | WDOGMODE | R/W |
0 | WDOGENABLE | R/W |

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#### MDDR_IO_CALIB_CR register details [ 0x400308070 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
14 | CALIB_LOCK | R/W |
13 | CALIB_START | R/W |
12 | CALIB_TRIM | R/W |
11:6 | NCODE | R/W |
5:0 | PCODE | R/W |

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#### RESERVED register details [ 0x400308074 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---

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#### EDAC_IRQ_ENABLE_CR register details [ 0x400308078 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
14 | MDDR_ECC_INT_EN | R/W |
13 | CAN_EDAC_2E_EN | R/W |
12 | CAN_EDAC_1E_EN | R/W |
11 | USB_EDAC_2E_EN | R/W |
10 | USB_EDAC_1E_EN | R/W |
9 | MAC_EDAC_RX_2E_EN | R/W |
8 | MAC_EDAC_RX_1E_EN | R/W |
7 | MAC_EDAC_TX_2E_EN | R/W |
6 | MAC_EDAC_TX_1E_EN | R/W |
3 | ESRAM1_EDAC_2E_EN | R/W |
2 | ESRAM1_EDAC_1E_EN | R/W |
1 | ESRAM0_EDAC_2E_EN | R/W |
0 | ESRAM0_EDAC_1E_EN | R/W |

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#### USB_CR register details [ 0x40030807C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
1 | USB_DDR_SELECT | R/W |
0 | USB_UTMI_SEL | R/W |

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#### ESRAM_PIPELINE_CR register details [ 0x400308080 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
0 | ESRAM_PIPELINE_ENABLE | R/W |

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#### MSS_IRQ_ENABLE_CR register details [ 0x400308084 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
19:10 | DDRB_INTERRUPT_EN | R/W |
9:7 | CC_INTERRUPT_EN | R/W |
6:0 | SW_INTERRUPT_EN | R/W |

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#### RTC_WAKEUP_CR register details [ 0x400308088 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
2 | RTC_WAKEUP_C_EN | R/W |
1 | RTC_WAKEUP_FAB_EN | R/W |
0 | RTC_WAKEUP_M3_EN | R/W |

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#### MAC_CR register details [ 0x40030808C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
8:5 | RGMII_TXC_DELAY_SEL | R/W |
3:2 | ETH_PHY_MODE | R/W |
1:0 | ETH_LINE_SPEED | R/W |

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#### MSSDDR_PLL_STATUS_LOW_CR register details [ 0x400308090 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
29:26 | FACC_PLL_LOCKCNT | R/W |
25:23 | FACC_PLL_LOCKWIN | R/W |
22:19 | FACC_PLL_RANGE | R/W |
19:16 | FACC_PLL_DIVQ | R/W |
15:6 | FACC_PLL_DIVF | R/W |
5:0 | FACC_PLL_DIVR | R/W |

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#### MSSDDR_PLL_STATUS_HIGH_CR register details [ 0x400308094 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
12:8 | FACC_PLL_SSMF | R/W |
7:6 | FACC_PLL_SSMD | R/W |
5 | FACC_PLL_SSE | R/W |
4 | FACC_PLL_PD | R/W |
3 | FACC_PLL_FSE | R/W |
2 | FACC_PLL_MODE_3V3 | R/W |
1 | FACC_PLL_MODE_1V2 | R/W |
0 | FACC_PLL_BYPASS | R/W |

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#### MSSDDR_FACC1_CR register details [ 0x400308098 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
27 | FACC_FAB_REF_SEL | R/W |
26 | CONTROLLER_PLLT_INT | R/W |
25 | PERSIST_CC | R/W |
24:22 | BASE_DIVISOR | R/W |
21:19 | DDR_FIC_DIVISOR | R/W |
18:16 | FIC_1_DIVISOR | R/W |
15:13 | FIC_0_DIVISOR | R/W |
12 | FACC_GLMUX_SEL | R/W |
11:9 | M3_CLK_DIVISOR | R/W |
8 | DDR_CLK_EN | R/W |
7:5 | APB1_DIVISOR | R/W |
4:2 | APB0_DIVISOR | R/W |
1:0 | DIVISOR_A | R/W |

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#### MSSDDR_FACC2_CR register details [ 0x40030809C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
13 | MSS_XTAL_RTC_EN | R/W |
12 | MSS_XTAL_EN | R/W |
11 | MSS_CLK_ENVM_EN | R/W |
10 | MSS_1MHZ_EN | R/W |
9 | MSS_25_50MHZ_EN | R/W |
8:6 | FACC_STANDBY_SEL | R/W |
5 | FACC_PRE_SRC_SEL | R/W |
4:2 | FACC_SRC_SEL | R/W |
1:0 | RTC_CLK_SEL | R/W |

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#### PLL_LOCK_EN_CR register details [ 0x4003080A0 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
3 | FAB_PLL_LOCK_LOST_EN | R/W |
2 | FAB_PLL_LOCK_EN | R/W |
1 | MPLL_LOCK_LOST_EN | R/W |
0 | MPLL_LOCK_EN | R/W |

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#### MSSDDR_CLK_CALIB_CR register details [ 0x4003080A4 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
0 | FAB_CALIB_START | R/W |

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#### PLL_DELAY_LINE_SEL_CR register details [ 0x4003080A8 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
1:0 | PLL_REF_DEL_SEL | R/W |

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#### MAC_STAT_CLRONRD_CR register details [ 0x4003080AC ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
1 | MAC_STAT_CLRONRD | R/W |

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#### RESET_SOURCE_CR register details [ 0x4003080B0 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
7 | USER_M3_RESET_DETECT | R/W |
6 | USER_RESET_DETECT | R/W |
5 | WDOG_RESET_DETECT | R/W |
4 | LOCKUP_RESET_DETECT | R/W |
3 | SOFT_RESET_DETECT | R/W |
2 | CONTROLLER_M3_RESET_DETECT | R/W |
1 | CONTROLLER_RESET_DETECT | R/W |
0 | P0_RESET_DETECT | R/W |

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#### CC_DC_ERR_ADDR_SR register details [ 0x4003080B4 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_DC_ERR_ADDR | R/W |

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#### CC_IC_ERR_ADDR_SR register details [ 0x4003080B8 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_IC_ERR_ADDR | R/W |

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#### CC_SB_ERR_ADDR_SR register details [ 0x4003080BC ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_SB_ERR_ADDR | R/W |

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#### RESERVED register details [ 0x4003080C0 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---

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#### CC_IC_MISS_CNTR_SR register details [ 0x4003080C4 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_IC_MISS_CNT | R/W |

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#### CC_IC_HIT_CNTR_SR register details [ 0x4003080C8 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_IC_HIT_CNT | R/W |

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#### CC_DC_MISS_CNTR_SR register details [ 0x4003080CC ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_DC_MISS_CNT | R/W |

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#### CC_DC_HIT_CNTR_SR register details [ 0x4003080D0 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_DC_HIT_CNT | R/W |

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#### CC_IC_TRANS_CNTR_SR register details [ 0x4003080D4 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_IC_TRANS_CNT | R/W |

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#### CC_DC_TRANS_CNTR_SR register details [ 0x4003080D8 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CC_DC_TRANS_CNT | R/W |

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#### DDRB_DS_ERR_ADR_SR register details [ 0x4003080DC ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | DDRB_DS_ERR_ADD | R/W |

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#### DDRB_HPD_ERR_ADR_SR register details [ 0x4003080E0 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | DDRB_HPD_ERR_ADD | R/W |

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#### DDRB_SW_ERR_ADDR_SR register details [ 0x4003080E4 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | DDRB_SW_ERR_ADD | R/W |

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#### DDRB_BUF_EMPTY_SR register details [ 0x4003080E8 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
6 | DDRB_IDC_RBEMPTY | R/W |
5 | DDRB_HPD_RBEMPTY | R/W |
4 | DDRB_HPD_WBEMPTY | R/W |
3 | DDRB_SW_RBEMPTY | R/W |
2 | DDRB_SW_EBEMPTY | R/W |
1 | DDRB_DS_RBEMPTY | R/W |
0 | DDRB_DS_WBEMPTY | R/W |

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#### DDRB_DSBL_DN_SR register details [ 0x4003080EC ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
6 | DDRB_IDC_DSBL_DN | R/W |
5 | DDRB_HPD_RDSBL_DN | R/W |
4 | DDRB_HPD_WDSBL_DN | R/W |
3 | DDRB_SW_RDSBL_DN | R/W |
2 | DDRB_SW_WDSBL_DN | R/W |
1 | DDRB_DS_RDSBL_DN | R/W |
0 | DDRB_DS_WDSBL_DN | R/W |

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#### ESRAM0_EDAC_CNT register details [ 0x4003080F0 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:16 | ESRAM0_EDAC_CNT_2E | R/W |
15:0 | ESRAM0_EDAC_CNT_1E | R/W |

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#### ERAM1_EDDAC_CNT register details [ 0x4003080F4 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:16 | ESRAM1_EDAC_CNT_2E | R/W |
15:0 | ESRAM1_EDAC_CNT_1E | R/W |

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#### CC_EDAC_CNT register details [ 0x4003080F8 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:16 | CC_EDAC_CNT_2E | R/W |
15:0 | CC_EDAC_CNT_1E | R/W |

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#### MAC_EDAC_TX_CNT register details [ 0x4003080FC ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:16 | MAC_EDAC_TX_CNT_2E | R/W |
15:0 | MAC_EDAC_TX_CNT_1E | R/W |

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#### MAC_EDAC_RX_CNT register details [ 0x400308100 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:16 | MAC_EDAC_RX_CNT_2E | R/W |
15:0 | MAC_EDAC_RX_CNT_1E | R/W |

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#### USB_EDAC_CNT register details [ 0x400308104 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:16 | USB_EDAC_CNT_2E | R/W |
15:0 | USB_EDAC_CNT_1E | R/W |

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#### CAN_EDAC_CNT register details [ 0x400308108 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:16 | CAN_EDAC_CNT_2E | R/W |
15:0 | CAN_EDAC_CNT_1E | R/W |

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#### ESRAM0_EDAC_ADR register details [ 0x40030810C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
25:13 | ESRAM0_EDAC_2E_AD | R/W |
12:0 | ESRAM0_EDAC_1E_AD | R/W |

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#### ERSAM1_EDAC_ADR register details [ 0x400308110 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
25:13 | ESRAM1_EDAC_2E_AD | R/W |
12:0 | ESRAM1_EDAC_1E_AD | R/W |

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#### MAC_EDAC_RX_ADR register details [ 0x400308114 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
25:13 | MAC_EDAC_RX_2E_AD | R/W |
12:0 | MAC_EDAC_RX_1E_AD | R/W |

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#### MAC_EDAC_TX_ADR register details [ 0x400308118 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
25:13 | MAC_EDAC_TX_2E_AD | R/W |
12:0 | MAC_EDAC_TX_1E_AD | R/W |

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#### CAN_EDAC_ADR register details [ 0x40030811C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
25:13 | CAN_EDAC_2E_AD | R/W |
12:0 | CAN_EDAC_1E_AD | R/W |

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#### USB_EDAC_ADR register details [ 0x400308120 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
25:13 | USB_EDAC_2E_AD | R/W |
12:0 | USB_EDAC_1E_AD | R/W |

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#### MM0_1_2_SECURITY register details [ 0x400308124 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
9 | MM0_1_2_MS6_ALLOWED_W | R/W |
8 | MM0_1_2_MS6_ALLOWED_R | R/W |
7 | MM0_1_2_MS3_ALLOWED_W | R/W |
6 | MM0_1_2_MS3_ALLOWED_R | R/W |
5 | MM0_1_2_MS2_ALLOWED_W | R/W |
4 | MM0_1_2_MS2_ALLOWED_R | R/W |
3 | MM0_1_2_MS1_ALLOWED_W | R/W |
2 | MM0_1_2_MS1_ALLOWED_R | R/W |
1 | MM0_1_2_MS0_ALLOWED_W | R/W |
0 | MM0_1_2_MS0_ALLOWED_R | R/W |

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#### MM4_5_DDR_FIC_SECURITY/MM_4_5_FIC64_SECURITY register details [ 0x400308128 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
9 | MM4_5_DDR_FIC_MS6_ALLOWED_W | R/W |
8 | MM4_5_DDR_FIC_MS6_ALLOWED_R | R/W |
7 | MM4_5_DDR_FIC_MS3_ALLOWED_W | R/W |
6 | MM4_5_DDR_FIC_MS3_ALLOWED_R | R/W |
5 | MM4_5_DDR_FIC_MS2_ALLOWED_W | R/W |
4 | MM4_5_DDR_FIC_MS2_ALLOWED_R | R/W |
3 | MM4_5_DDR_FIC_MS1_ALLOWED_W | R/W |
2 | MM4_5_DDR_FIC_MS1_ALLOWED_R | R/W |
1 | MM4_5_DDR_FIC_MS0_ALLOWED_W | R/W |
0 | MM4_5_DDR_FIC_MS0_ALLOWED_R | R/W |

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#### MM3_6_7_8_SECURITY register details [ 0x40030812C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
9 | MM3_6_7_8_MS6_ALLOWED_W | R/W |
8 | MM3_6_7_8_MS6_ALLOWED_R | R/W |
7 | MM3_6_7_8_MS3_ALLOWED_W | R/W |
6 | MM3_6_7_8_MS3_ALLOWED_R | R/W |
5 | MM3_6_7_8_MS2_ALLOWED_W | R/W |
4 | MM3_6_7_8_MS2_ALLOWED_R | R/W |
3 | MM3_6_7_8_MS1_ALLOWED_W | R/W |
2 | MM3_6_7_8_MS1_ALLOWED_R | R/W |
1 | MM3_6_7_8_MS0_ALLOWED_W | R/W |
0 | MM3_6_7_8_MS0_ALLOWED_R | R/W |

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#### MM9_SECURITY register details [ 0x400308130 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
9 | MM9_MS6_ALLOWED_W | R/W |
8 | MM9_MS6_ALLOWED_R | R/W |
7 | MM9_MS3_ALLOWED_W | R/W |
6 | MM9_MS3_ALLOWED_R | R/W |
5 | MM9_MS2_ALLOWED_W | R/W |
4 | MM9_MS2_ALLOWED_R | R/W |
3 | MM9_MS1_ALLOWED_W | R/W |
2 | MM9_MS1_ALLOWED_R | R/W |
1 | MM9_MS0_ALLOWED_W | R/W |
0 | MM9_MS0_ALLOWED_R | R/W |

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#### M3_SR register details [ 0x400308134 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
7:0 | CURRPRI | R/W |

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#### ETM_COUNT_LOW register details [ 0x400308138 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | ETMCOUNT_31_0 | R/W |

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#### ETM_COUNT_HIGH register details [ 0x40030813C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
27:25 | ETMINTSTAT | R/W |
24:16 | ETMINTNUM | R/W |
15:0 | ETMCOUNT_47_32 | R/W |

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#### DEVICE_SR register details [ 0x400308140 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
6 | M3_DEBUG_ENABLE | R/W |
5 | M3_DISABLE | R/W |
4 | FLASH_VALID_SYNC | R/W |
3 | WATCHDOG_FREEZE_SYNC | R/W |
2 | FF_IN_PROGRESS_SYNC | R/W |
1 | VIRGIN_PART | R/W |
0 | CORE_UP_SYNC | R/W |

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#### ENVM_PROTECT_USER register details [ 0x400308144 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
15 | NVM1_UPPER_WRITE_ALLOWED | R/W |
14 | NVM1_UPPER_OTHERS_ACCESS | R/W |
13 | NVM1_UPPER_FABRIC_ACCESS | R/W |
12 | NVM1_UPPER_M3ACCESS | R/W |
11 | NVM1_LOWER_WRITE_ALLOWED | R/W |
10 | NVM1_LOWER_OTHERS_ACCESS | R/W |
9 | NVM1_LOWER_FABRIC_ACCESS | R/W |
8 | NVM1_LOWER_M3ACCESS | R/W |
7 | NVM0_UPPER_WRITE_ALLOWED | R/W |
6 | NVM0_UPPER_OTHERS_ACCESS | R/W |
5 | NVM0_UPPER_FABRIC_ACCESS | R/W |
4 | NVM0_UPPER_M3ACCESS | R/W |
3 | NVM0_LOWER_WRITE_ALLOWED | R/W |
2 | NVM0_LOWER_OTHERS_ACCESS | R/W |
1 | NVM0_LOWER_FABRIC_ACCESS | R/W |
0 | NVM0_LOWER_M3ACCESS | R/W |

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#### ENVM_STATUS register details [ 0x400308148 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
0 | CODE_SHADOW_EN | R/W |

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#### DEVICE_VERSION register details [ 0x40030814C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
19:16 | IDV | R/W |
15:0 | IDP | R/W |

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#### MSSDDR_PLL_STATUS register details [ 0x400308150 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
2 | RCOSC_DIV2 | R/W |
1 | MPLL_LOCK | R/W |
0 | FAB_PLL_LOCK | R/W |

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#### USB_SR register details [ 0x400308154 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
1 | LPI_CARKIT_EN | R/W |
0 | POWERDN | R/W |

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#### ENVM_SR register details [ 0x400308158 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
1:0 | ENVM_BUSY | R/W |

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#### RESERVED register details [ 0x40030815C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---

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#### DDRB_STATUS register details [ 0x400308160 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | DDRB_DEBUG_STATUS | R/W |

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#### MDDR_IO_CALIB_STATUS register details [ 0x400308164 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
14 | CALIB_PCOMP | R/W |
13 | CALIB_NCOMP | R/W |
12:6 | CALIB_PCODE | R/W |
5:1 | CALIB_NCODE | R/W |
0 | CALIB_STATUS | R/W |

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#### MSSDDR_CLK_CALIB_STATUS register details [ 0x400308168 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
0 | FAB_CALIB_FAIL | R/W |

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#### WDOGLOAD register details [ 0x40030816C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
25:0 | WDOGLOAD | R/W |

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#### WDOGMVRP register details [ 0x400308170 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | WDOGMVRP | R/W |

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#### USERCONFIG0 register details [ 0x400308174 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CONFIG_REG0 | R/W |

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#### USERCONFIG1 register details [ 0x400308178 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CONFIG_REG1 | R/W |

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#### USERCONFIG2 register details [ 0x40030817C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CONFIG_REG2 | R/W |

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#### USERCONFIG3 register details [ 0x400308180 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | CONFIG_REG4 | R/W |

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#### FAB_PROT_SIZE register details [ 0x400308184 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
5:0 | SW_PROTREGIONSIZE | R/W |

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#### FAB_PROT_BASE register details [ 0x400308188 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
31:0 | SW_PROTREGIONBASE | R/W |

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#### MSS_GPIO_DEF register details [ 0x40030818C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
3 | MSS_GPIO_31_24_DEF | R/W |
2 | MSS_GPIO_23_16_DEF | R/W |
1 | MSS_GPIO_15_8_DEF | R/W |
0 | MSS_GPIO_7_0_DEF | R/W |

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#### EDAC_SR register details [ 0x400308190 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
13 | CAN_EDAC_2E | R/W |
12 | CAN_EDAC_1E | R/W |
11 | USB_EDAC_2E | R/W |
10 | USB_EDAC_1E | R/W |
9 | MAC_EDAC_RX_2E | R/W |
8 | MAC_EDAC_RX_1E | R/W |
7 | MAC_EDAC_TX_2E | R/W |
6 | MAC_EDAC_TX_1E | R/W |
3 | ESRAM1_EDAC_2E | R/W |
2 | ESRAM1_EDAC_1E | R/W |
1 | ESRAM0_EDAC_2E | R/W |
0 | ESRAM0_EDAC_1E | R/W |

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#### MSS_INTERNAL_SR register details [ 0x400308194 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
6 | DDR_FIC_INT | R/W |
5 | MDDR_ECC_INT | R/W |
4 | MDDR_IO_CALIB_INT | R/W |
3 | FAB_PLL_LOCKLOST_INT | R/W |
2 | FAB_PLL_LOCK_INT | R/W |
1 | MPLL_LOCKLOST_INT | R/W |
0 | MPLL_LOCK_INT | R/W |

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#### MSS_EXTERNAL_SR register details [ 0x400308198 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
18 | CC_HRESP_ERR | R/W |
17 | DDRB_LOCK_MID | R/W |
16 | DDRB_LCKOUT | R/W |
15 | DDRB_HPD_WR_ERR | R/W |
14 | DDRB_SW_WR_ERR | R/W |
13 | DDRB_DS_WR_ERR | R/W |
12:7 | DDRB_RDWR_ERR_REG | R/W |
6:0 | SW_ERRORSTATUS | R/W |

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#### WDOGTIMEOUTEVENT register details [ 0x40030819C ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
0 | WDOGTIMEOUTEVENT | R/W |

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#### CLR_MSS_COUNTERS register details [ 0x4003081A0 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
5 | CC_DC_TRANS_CNTCLR | R/W |
4 | CC_IC_TRANS_CNTCLR | R/W |
3 | CC_DC_HIT_CNTCLR | R/W |
2 | CC_DC_MISS_CNTCLR | R/W |
1 | CC_IC_HIT_CNTCLR | R/W |
0 | CC_IC_MISS_CNTCLR | R/W |

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#### CLR_EDAC_COUNTERS register details [ 0x4003081A4 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
13 | CAN_EDAC_CNTCLR_2E | R/W |
12 | CAN_EDAC_CNTCLR_1E | R/W |
11 | USB_EDAC_CNTCLR_2E | R/W |
10 | USB_EDAC_CNTCLR_1E | R/W |
9 | MAC_EDAC_RX_CNTCLR_2E | R/W |
8 | MAC_EDAC_RX_CNTCLR_1E | R/W |
7 | MAC_EDAC_TX_CNTCLR_2E | R/W |
6 | MAC_EDAC_TX_CNTCLR_1E | R/W |
3 | ESRAM1_EDAC_CNTCLR_2E | R/W |
2 | ESRAM1_EDAC_CNTCLR_1E | R/W |
1 | ESRAM0_EDAC_CNTCLR_2E | R/W |
0 | ESRAM0_EDAC_CNTCLR_1E | R/W |

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#### FLUSH_CR register details [ 0x4003081A8 ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
8 | DDRB_INVALID_IDC | R/W |
7 | DDRB_INVALID_HPD | R/W |
6 | DDRB_INVALID_SW | R/W |
5 | DDRB_INVALID_DS | R/W |
4 | DDRB_FLSHSW | R/W |
3 | DDRB_FLSHHPD | R/W |
2 | DDRB_FLSHDS | R/W |
1 | CC_FLUSH_CHLINE | R/W |
0 | CC_FLUSH_CACHE | R/W |

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#### MAC_STAT_CLR_CR register details [ 0x4003081AC ] :

width: 32-bit

Bit Number | Name | R/W | Description
--- | --- | --- | ---
0 | MAC_STAT_CLR | R/W |

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back to CM3 Memory Map

### MSSFIC2TOFABRIC : Memory Map [ 0x4002_0000 - 0x4003_7FFF ]

range: 0x0001_8000
back to CM3 Memory Map

### RTC : Memory Map [ 0x4001_7000 - 0x4001_7FFF ]

range: 0x1000
back to CM3 Memory Map

### COMBLK : Memory Map [ 0x4001_6000 - 0x4001_6FFF ]

range: 0x1000
back to CM3 Memory Map

### HDMA : Memory Map [ 0x4001_4000 - 0x4001_4FFF ]

range: 0x1000
back to CM3 Memory Map

### GPIO : Memory Map [ 0x4001_3000 - 0x4001_3FFF ]

range: 0x1000
back to CM3 Memory Map

### H2FINTERRUPT : Memory Map [ 0x4000_6000 - 0x4000_6FFF ]

range: 0x1000
back to CM3 Memory Map

### TIMER : Memory Map [ 0x4000_4000 - 0x4000_4FFF ]

range: 0x1000
back to CM3 Memory Map

### MMUART_0 : Memory Map [ 0x4000_0000 - 0x4000_0FFF ]

range: 0x1000
back to CM3 Memory Map

### RECYCLED_ESRAM1 : Memory Map [ 0x2001_2000 - 0x2001_3FFF ]

range: 0x0000_2000
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### RECYCLED_ESRAM0 : Memory Map [ 0x2001_0000 - 0x2001_1FFF ]

range: 0x0000_2000
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### ESRAM1 : Memory Map [ 0x2000_8000 - 0x2000_FFFF ]

range: 0x0000_8000
back to CM3 Memory Map

### ESRAM0 : Memory Map [ 0x2000_0000 - 0x2000_7FFF ]

range: 0x0000_8000
back to CM3 Memory Map