FPGA Full System Stack TE0950 with 10G Linux Network Stack (Non-Accelerated)

The FFSS-TE0950-Netdev-10G is an FPGA Full System Stack (FFSS), i.e. a customizable FPGA design platform for Linux-based (non-accelerated) 10 GigE network connectivity.
This FFSS combines an MLE optimized Linux network stack with Trenz Electronic’s TE0950 Evaluation Board featuring the AMD Versal™ AI Edge VE2302. 
All key functionality is pre-integrated and pre-validated and ships as a compilable FPGA design project along with an IP-Core license from MLE.

Key Features

• 150k LUTs total (approx. 140k LUTs free-for-use and 10k LUTs reserved by FFSS)
• Trenz TE0950 (AMD Versal™ AI Edge XCVE2302-1LSESFVA784 SoC with 8 GByte DDR4 SDRAM)
• 10 GigE subsystem, configured and wired to zQFSP via AMD PG292 and ARM A72 Linux
  • “Unlimited” TCP/IP or UDP/IP sessions (not accelerated)
  • Linux userspace scripts (use as design example)
• Ubuntu 24.04 LTS Linux (pre-installed root filesystem on SDCard)
• 1x RJ45 1 GigE LAN port (fully accessible from Linux)

Use Cases

Application development of low data-rate networked systems where your Linux application transmits and/or receives data over a TCP/UDP/IPv4 network connected to 25 Gig Ethernet. Examples include:

• Camera sensor nodes
• Low-speed Robotics control
• IoT Applications

Implement Your Linux userspace application and interface with a standard, open-source (non-accelerated) Linux networking stack via 25 GigE via the zQSFP of the TE0950 board.

Benefits

Pre-integrating and testing this complex stack gives you, the implementer the advantages:

• You can rely on a tested and verified subsystem implementation. The concept of re-use increases design productivity while sharing the FPGA subsystem development costs and risks over many users.
• Pre-validated FPGA IPs and Subsystems make clever use of diff erent FPGA resources to realize a cost/performance optimized domain-specifi c architecture. No need for reading long datasheets or making timing closure.
• Operating system and application software is included in the form of kernel space device drivers, user-space programmer APIs, and sometimes even complete OS images, all nicely tuned for guaranteeing the overall system’s reliability and performance.

FFSS Software Specification

• 150k LUTs total (approx. 140k LUTs free-for-use and 10k LUTs reserved by FFSS)
• 10 GigE subsystem, confi gured and wired to zQFSP via AMD PG292 and ARM A72 Linux
  • “Unlimited” TCP/IP or UDP/IP sessions (not accelerated)
  • Linux userspace scripts (use as design example)
• Ubuntu 24.04 LTS Linux (pre-installed root filesystem on SDCard)

Hardware Specification

•  AMD Versal™ AI Edge XCVE2302-1LSESFVA784 device 
  • A784 package (pin compatible VE2202, VE2302, VM1102)
  • AMD Artix™ 7 FPGA as confi gurable Levelshifter/MUX for FMC and other 3.3 V IOs
• 8 GByte DDR4 SDRAM
• 128 MByte QSPI Flash (primary boot option)
• MicroSD card (primary boot option)
• 32 GByte eMMC (secondary boot option)
• USB 2.0 Host/Device/OTG (type Micro A/B connector)
• Gigabit Ethernet RJ45
• zQSFP with 4 GTYP Transceiver
• 2x CRUVI HS
• 2x CRUVI LS
• CSI-2 connector (camera, 2 lane MIPI)
• FMC: 4 GTYP Transceiver
• Dimension: 150 mm x 120 mm

Scope of Delivery

• 1x Trenz TE0950 board
• 1x power adapter
• 1x CoolJag BUF-A4 Fansink
• 1x SD Card (to install root file system)
• Full FPGA System Stack including Software, Firmware, Gateware (i.e. SD Card image with bitfi le, Board Support Package, Linux, drivers.
  Downloadable as binaries and in the form of FPGA Design Project Archive (compilable netlist)
• Single-project-use fully paid-up-for, perpetual commercial license for single unit.

References

• Manufacturer: Trenz Electronic GmbH
• Manufacturer's article number: 35527

Ressources

• Trenz Electronic TE0950 Wiki
• Support Forum
• Datasheet: https://www.missinglinkelectronics.com/fpga-hardware/fpga-full-system-stack/#documentation

Transfer of Data to Third Parties (MLE – Missing Link Electronics)

For the purpose of processing your order, it may be necessary to share the data you provide during the ordering process with our partner Missing Link Electronics (MLE). This includes, in particular, information required for the integration, licensing, and provision of the IP core supplied by MLE in the hardware manufactured by us.
By placing an order, you agree that the data required for this purpose may be transferred to MLE. Such transfer is carried out solely for the purpose of fulfilling the contract in accordance with Art. 6(1)(b) GDPR. MLE is obligated to use the received data exclusively for the purposes stated above and to comply with all applicable data protection regulations.