Key Features Supported SoM Trenz Electronic high-performance MPSoC module TE0865 with an AMD Zynq™ UltraScale+™ B2B Connectors 4x B2B Samtec ADF6-60-03.5-L-4-2-FR IO resources: 1x stacked zQSFP+ (2x zQSFP+) 2x stacked SFP+ (4x SFP+) Display Port TX 2 Lanes 1x RJ45 stacked with 2x USB3.0 Type A 1x Push-Push microSD 2x FMC+ (16x DP + 18x LA) 1x FMC (8x DP + 34x LA) M.2 SSD Socket Connector Key M PCIe 2x LS CRUVI 1x HS CRUVI 2x GT CRUVI MIPI CSI-2 4 Lanes (22 pins connector)  JTAG via USB Type C (FTDI FT2232H) 1x Samtec FireFly (4 Lanes) 1x USB Type E (Assembly option) Clock source: 2x PLL SI5338A-B-GMR ON-Board peripherals  1x 128K EEPROM 24LC128-I/ST 2x 8K EEPROM M93C66-RMC6TG 2x 512K EEPROM CAT24C512WI-GT3 5x DIP Switches 7x Push Buttons 27x Green LEDs + 4x Red Leds System controller: Altera MAX 10 FPGA 10M08SAU169I7G Dimension 231 x 213 mm Power 12V Input Supply Voltage

Key Features SoC Altera Agilex 3 SoC C-Series, W-code, package B23C (474pin) Possible variants: A3C 025 (no LPDDR4), 050, 065, 100, 135 RAM / Storage QSPI Flash, single; 256 Mbit (32 MByte) (up to 1 Gbit (128 MByte)) LPDDR4 SDRAM (16 Bit) HPS; 512 MByte (up to 2 GByte) 3x EEPROM 4kbit for FTDI, 2kbit, 128kbit IO Resources HVIO: 84 SE On-Board Peripherals Security: Trusted Platform Module TPM 2.0 Clock: 12 MHz (FTDI), 25 MHz (SDM), 200 MHz (LPDDR4) LEDs: 2x RGB LED, 1x LED Push Buttons: 1x User USB Programmer: USB Blaster III (JTAG + UART of FIFO Interface) Interface 2x 50 pin-header connectors, 1x 14 pin-header connector Power USB-C: 5 V Dimension 35 x 73 mm

Key Features Main FPGA: AMD Spartan Ultrascale+ XCSU35P, SBVB625 package. Optional: SU10P, SU25P, SU50P (for 21.01.2026 SU50P doesn't exist) Memory: QSPI Flash 256Mbit SDRAM 512Mb EEPROM 128K IO resources: PL IO 50 SE 24 diff (B47 HP)  + 8/3 (B45 HD) + 42/21 (B65 HD) + 20/10 (B66 HD) + 40/20 (B67 HD)+ 18/9 (B68 HD) ON-Board Peripherals: 1x USB to UART bridge 1x 100 MHz Clock generator 3x user LEDs + 1x Done LED B2B Connectors: 3x Samtec LSHM Dimension: Size 40mm x 50mm Power: Power Supply: Single 3.3V or Dual 3.3/5V    

Key Features SoC AMD Zynq UltraScale+ Device: ZU4 / ZU5 / ZU7 Engine: CG / EG / EV Speedgrade: -1 / -2 / -3 Temperature Range: Extended / Industrial Package: FBVB900 Memory Up to 8 GByte 72-Bit DDR4 SDRAM with ECC (PS domain) Up to 2 GByte 32-Bit DDR4 SDRAM (PL domain) Up to 512 MByte QSPI Boot Flash (dual parallel) Up to 64 GByte eMMC (Boot possible) 2 x 2 KBit I2C EEPROM with EUI-48 node identity ON-Board periphery 2 x Gigabit Ethernet PHY transceiver Hi-Speed USB 2.0 ULPI transceiver with full OTG support Built-in TPM 2.0 (Trusted Platform Module) protection RFID module (optional) Interface via 2 x Samtec ADM6 240 pin B2B connector Multigigabit interface Transceivers: 4 x GTR 16 x GTH Clocks 4 x GTR 8 x GTH User available IOs: Processing Side 12 x MIO I2C MIO Programmable Logic:  HP Banks: 52 SE / 24 DIFF HD Banks: 48 SE / 24 DIFF Interfaces 2 x Ethernet USB 2.0 Configuration: JTAG Boot mode selection Power All power supplies are on board. Single 5 V ... 12 V power input 1.8 V and 3.3 V power outputs are available on B2B connector Dimension 55 mm x 74 mm    

Key Features SoC Altera Agilex 3 SoC C-Series, W-code, package B23C (931pin) Possible variants: A3C 100, 135 RAM / Storage QSPI Flash, single; 256 Mbit (32 MByte) (up to 1 Gbit (128 MByte)) LPDDR4 SDRAM (32 Bit) HPS; 1 GByte (up to 4 GByte) eMMC (selectable eMMC or SDIO); 8 GByte (up to 64 GByte) 2x EEPROM 2kbit with MAC address IO Resources Gigabit transceivers: 4 (support HIP PCIe x4 Gen3), 12.5 Gbit/s HSIO: 24 DIFF / 48 SE + MIPI D-PHY (4 Data+ CLK + REF CLK) HVIO: 120 SE HPS: 12 I/O (SD3.0/eMMC, UART, I2C, I3C etc.) On-Board Peripherals Ethernet (HPS): 1x Gigabit PHY (RGMII) Ethernet (FPGA): 1x Gigabit PHY (RGMII) USB: 1x, USB2.0 PHY (ULPI), USB3.1 Support 5Gbps (using XCVR) Security: Trusted Platform Module TPM 2.0 Clock: 25 MHz (SDM), 25 MHz (HPS), 200 MHz (LPDDR4), diff. CLKs from B2B Interface 2x 240-pin Samtec AccelerateHD ADM6 connector Power 5 V ... 12 V power supply Dimension 40 x 56.4 mm

Key Features SoC Altera Agilex 5 SoC E-Series Device Group B (A5ED028BB32AE4S) Package B32A; compatible device: Device Group A, Specification C,D: A5E 013A, A5E 028A Device Group B, Specification A,B,C,D,E: A5E 008B, A5E 013B, A5E 028B (default) Assembly variants possible on request RAM / Storage 1x QSPI Flash, 32MB (Expandable up to 256MB) 1 GB LPDDR4 SDRAM (32 Bit) for HPS (Expandable up to 4 GB) 8 GB eMMC (Expandable up to 64 GB) 1x 2Kbit & 1x 128Kbit EEPROMs Memory IO Resources MGT*: up to 12x transceivers (up to 28 Gbit/s) HSIO: 96 DIFF / 192 SE + MIPI D-PHY (4 Data+ CLK + REF CLK) HVIO: 200 single ended HPS IO: 19 I/O (SDIO, UART, I2C, I3C, GPIOs) * depends on FPGA assembly variants, IO resources could be changed On-Board Peripherals Gigabit Ethernet PHY (RGMII) USB2.0 PHY (ULPI), Support USB3.1 Gen1 5Gbps (use 1 transceiver) Security: Trusted Platform Module TPM 2.0 Clocks for LPDDR4 SDRAM, GigE PHY, USB PHY, SDM FPGA SD3.0 (optional) Interface 3x 240-pin Samtec Accelerate HD (ADM6) connectors Power 5 V ... 12 V power supply Dimension 52 x 76 mm