Optimizing engine control

TUfast optimizes engine control with an AMD MPSoC module

The development of electric drivetrains in motorsport places extremely high demands on power electronics, control engineering, and system integration. Formula Student teams must design, implement, validate, and integrate a complete system consisting of power electronics, motor control, sensor interfaces, software, and vehicle communication within only two university semesters. The increasing power density of modern electric race cars, combined with limited installation space and strict reliability requirements, makes highly integrated FPGA/MPSoC platforms a key element of high‑performance control architectures. The TUfast Formula Student Team at the Technical University of Munich (TUM) developed a new power converter using an AMD Zynq™ UltraScale+™ module from Trenz Electronic.

Challenge

Electric race cars use multiple permanent‑magnet synchronous machines that must be controlled precisely and dynamically using field‑oriented control (FOC). These control loops require deterministic execution in the high‑kilohertz range, including current measurement, rotor‑position acquisition, and PWM generation. Even small timing deviations degrade torque quality, efficiency, and thermal stability. Traditional microcontrollers reach their limits because they must simultaneously handle parallel processing, high sampling rates, and complex encoder protocols.

At the same time, overall system complexity continues to grow: vehicle communication via CAN, safety logic, diagnostics, and parameter management must all be integrated into the same platform. The development time is short, and on‑track testing opportunities are scarce. Teams therefore require hardware that supports hard real‑time execution, flexible software development, and rapid iteration cycles.

Implementation with Trenz Modules

FPGA modules with integrated Zynq™ UltraScale+™ MPSoCs enable a clear functional separation between time‑critical and non‑time‑critical tasks. FOC control loops, SPI‑based current measurement, EnDat encoder communication, and PWM generation are implemented in the programmable logic fabric. The deterministic parallelism of the FPGA allows multiple motor phases to be controlled simultaneously and without operating‑system jitter, meeting the stringent requirements for dynamic response and precision.

The ARM Cortex‑A53 cores in the processing system handle higher‑level control logic, vehicle communication, and parameter management. Bare‑metal implementations provide minimal latency, while the option to migrate to embedded Linux later offers additional scalability when needed.

A major advantage arises from the model‑based development workflow: control algorithms are modeled in Simulink and automatically translated into VHDL IP cores using HDL Coder, which are then integrated directly into Vivado block designs. This significantly reduces iteration times and minimizes errors during the transition from model to hardware. The compact form factor of the modules and the integrated power supplies simplify carrier‑board design and enable space‑efficient integration into the inverter.

In summary, the Trenz Electronic’s modules provide a powerful, scalable, and development‑friendly platform for electric drivetrains in motorsport, ideally suited for ambitious teams that must achieve maximum performance within the strictly constrained development window.