FPGA USB-Programmer2 JTAG (Arrow) for development with Intel FPGAs

US$41.61

expected to be available on 16-Dec-2025

Article number: TEI0004-02

Article status: Full production

Stock: 0

Product information "FPGA USB-Programmer2 JTAG (Arrow) for development with Intel FPGAs"

This article is the replacement for the TEI0004-01.

Features

Supported by Intel Quartus (JTAG mode only)
Based on FTDI FT2232H USB2 Interface
JTAG connector: standard 2 x 5 pin header
2.54 mm header
Intel JTAG Compatible Pinout
USB: MicroUSB connector, USB 2.0 HS support
Voltage levels supported: 1.8 to 3.3 V
Very small size: 13.5 x 22 mm
Additional UART Channel available
RED activity LED
GREEN Power-on LED

Important Note

Modules produced after June 2020 are no longer compatible with the older drivers.
Please install driver version 2.4 or newer.
See also driver revision change history.

Scope of Delivery

1 x TEI0004-02 FPGA USB-Programmer2 JTAG (Arrow)

Additional Information

All modules produced by Trenz Electronic are developed and manufactured in Germany.

Downloads

Digilent
OHO-Elektronik
Sundance
Trenz_Electronic - Documents and Design files for Trenz Electronic Products

File	File-Extension	Description
Bit-File	*.bit	FPGA Configuration File
Diverse Reports	--	Report files in different formats

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	I2C,SPI-Flash,UART
TE-IP	ASIO (AXI-Stream to IO)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO
TE-IP	Startupe2,LabTools Frequency Counter

Component	Description
Xilinx-IP	VIO (Virtual Input/Output)
TE-IP	Labtools Frequency Counter, Startupe2 Primitive Wrapper

Directory		Content
PCN		Product change notifications: Important changes between hardware revisions
Reference Design		Reference Designs sort by ISE/EDK Version
REV0x		Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Directory		Content
PCN		Product change notifications: Important changes between hardware revisions
REV0x		Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Component	Description
Xilinx-IP	MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite
TE-IP	ASIO GPIO (AXI-Stream to GPIO)

FPGA USB-Programmer2 JTAG (Arrow) for development with Intel FPGAs

Product information "FPGA USB-Programmer2 JTAG (Arrow) for development with Intel FPGAs"

Features

Important Note

Scope of Delivery

Additional Information

Downloads

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