SoC Module with AMD Zynq™ 7010-1I, 1 GByte DDR3L, 64 MByte Flash, 4 x 6 cm

US$248.71

Possible to order, delivery time on request.

Article number: TE0724-04-41I33-A

Article status: Full production

Stock: 0

Quantity	Unit price
To 9	US$248.71
From 10	US$223.84
From 25	US$211.40
From 50	US$198.97
From 100	US$186.53
From 250	US$174.10
From 500	US$161.66
From 1000	US$149.23

Product information "SoC Module with AMD Zynq™ 7010-1I, 1 GByte DDR3L, 64 MByte Flash, 4 x 6 cm"

The predecessor of this article is TE0724-04-41I32-A. All changes are in the Product Change Notification (PCN).

Please refer to the design note regarding the QSPI Flash used.

The Trenz Electronic TE0724-04-41I33-A is an industrial-grade SoC module integrating a AMD Zynq™ 7010 SoC, a Gigabit Ethernet transceiver, 1 GByte DDR3L SDRAM, 64 MByte Flash memory for configuration and operation, and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/Os is provided via a rugged high-speed stacking strip.

All this in a compact 4 x 6 cm form factor, at the most competitive price.

All parts are at least industrial temperature range of -40°C to +85°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.

Key Features

AMD Zynq™ XC7Z010-1CLG400I
- Dual-core ARM Cortex-A9 MPCore
- Max. 667 MHz
Rugged for high shock and vibration
Dimension: 4 x 6 cm
Plug on module with 1 x 160-pin High-Speed connectors
1 GByte DDR3L SDRAM
64 MByte QSPI Flash memory
1 x Gbit Ethernet PHY
Total I/O
PL:80, PS:20
1 x MAC-Adress EEPROM
128 KBit EEProm
1 x CAN transceiver
On-board DC/DC regulators
Evenly-spread supply pins for good signal integrity

Other assembly options for cost or performance optimization plus high volume prices available on request.

Recommended Software

Vivado Standard Edition (free version)

The Vivado Standard Edition is the FREE version of the Vivado design suite. Vivado Standard delivers instant access to some basic Vivado features and functionality at no cost.

Overview Vivado Standard and Enterprise Edition

Development Support

There is a base board available for this module.

Latest documentation, design support files and reference designs with source files are available for download free of charge.

Scope of Delivery

1 x TE0724-04-41I33-A Trenz Electronic SoC module with AMD Zynq™ Z-7010
4 x bolts
8 x screws

Additional Information

Manufacturer's article number: TE0724-04-41I33-A
Trenz Electronic TE0724 Wiki
Support Forum

All modules produced by Trenz Electronic are developed and manufactured in Germany.

Properties "SoC Module with AMD Zynq™ 7010-1I, 1 GByte DDR3L, 64 MByte Flash, 4 x 6 cm"

Properties

FPGA Manufacturer:	AMD
FPGA/SoC Architecture:	7 Series
FPGA/SoC Family:	Zynq
FPGA/SoC Type:	SoC
Form Factor:	4 × 6 cm

Data according to manufacturer. Errors and changes reserved.

Downloads

File	File-Extension	Description
Bit-File	*.bit	FPGA Configuration File
Diverse Reports	--	Report files in different formats

Component	Description
IP-Interfaces	I2C, ASIO (AXI-Stream to IO), SPI-Flash, Uart

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	I2C,SPI-Flash,UART
TE-IP	ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO
TE-IP	Startupe2,LabTools Frequency Counter

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Xilinx-IP	VIO (Virtual Input/Output)
TE-IP	Labtools Frequency Counter, Startupe2 Primitive Wrapper

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
Reference Design	Reference Designs sort by ISE/EDK Version
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Component	Description
Interface IPs	DDR3, GPIO, Uart0, QSPI and Ethernet

Application	Description
hello_world	Xilinx Hello World Example (.elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite
TE-IP	ASIO GPIO (AXI-Stream to GPIO)

Application	Description
Hello World	Xilinx Hello world ( generate elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO,ILA
TE-IP	unio_mac

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Interface IPs	QSPI, Uart, ASIO (Axi-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	ILA, VIO, CLK-Wizard
TE-IP	F32C, Vector_LED, UART_MON

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Component	Description
IP-Interfaces	DDR3, QSPI, Uart, I2C, Ethernet, ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite, VIO
TE-IP	ASIO (AXI-Stream to IO), labtools_fmeter

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
te_spi_bootloader	SPI Bootloader (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
memory_tests	Xilinx Memory Example (.elf only)

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems

Component	Description
Zynq Processor	activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C,2x SD,1x Ethernet

Digilent
OHO-Elektronik
Sundance
Trenz_Electronic - Documents and Design files for Trenz Electronic Products
inrevium
reference
Files SBSE____.ZZC
Size 4 B / Modified 29.09.2026 - 16:31:35

TE0724 - 4 x 6 cm SoC module with Xilinx Zynq

TE0724 - Wiki with TRM, reference projects, application notes and more
- TE0724 TRM - Technical Reference Manual
- TE0724 Product Change Notifications - PCN (see also Schematic Change History and TRM)
- TE0724 Reference Designs - Reference Design Description for Vivado 2017.2 and newer
- TE0724 Design and Advisory Notes - DN/AVN

4 x 6 Carrier

4 x 6 SoM Carriers - overview of available carrier boards for all 4 x 6 cm modules

Support

For support, please go to http://forum.trenz-electronic.de/ or contact support@trenz-electronic.de

Accessories

Samtec Ultra Fine Pitch Socket REF192552-01, 160 Pins

SS5 series, Board-to-Board connector 160-pins, 80 contacts per row, 3.5 mm pin height

Article number: 27219

Stock: 0

From US$5.71

Details

BGA Heat Sink for Trenz Electronic Module TE0724-04, 17 x 17 x 17.5 mm

High Performance maxiFLOW/superGRIP Heat Sink BGA Aluminum, Top Mount

Article number: 30829

Stock: 0

From US$30.30

Details

Baseboard for TE0724

Development carrier board for the TE0724 SoC module and compatible modules.

Article number: TEB0724-02

Stock: 62

US$159.46

Details

Application	Description
zynq_fsbl	Default Xilinx FSBL
u-boot	Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>)

Application	Description
zynq_fsbl	Zynq First Stage Bootloader (Modified)
hello_world	TE0720 Xilinx Hello World Example
u-boot	Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default)

Name	Folder	Description
Source Name	<design_name><folder>	Source Description
PetaLinux Project	<design_name>/os/petalinux	PetaLinux Project with Ethernet,USB,RTC

SoC Module with AMD Zynq™ 7010-1I, 1 GByte DDR3L, 64 MByte Flash, 4 x 6 cm

Product information "SoC Module with AMD Zynq™ 7010-1I, 1 GByte DDR3L, 64 MByte Flash, 4 x 6 cm"

Key Features

Recommended Software

Development Support

Scope of Delivery

Additional Information

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