MPSoC Module with AMD Zynq™ UltraScale+™ ZU7EV-1I, 4 GByte DDR4, 5.2 x 7.6 cm

US$1,795.71

Article number: TE0817-02-7DI81-A

Article status: Upgrade available

Stock: 0

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Product information "MPSoC Module with AMD Zynq™ UltraScale+™ ZU7EV-1I, 4 GByte DDR4, 5.2 x 7.6 cm"

The predecessor of this article is TE0817-01-7DI21-A. All changes are in the Product Change Notification (PCN).

The TE0817 is largely identical in construction to the TE0807. The essential difference are new Samtec BGA connectors, which guarantees a reliable contact. The dimensions are identical.

The Trenz Electronic TE0817-02-7DI81-A is a powerful MPSoC module integrating a AMD Zynq™ UltraScale+™ ZU7EV, 4 GByte DDR4 SDRAM, 128 MByte Flash memory for configuration and operation, 20 x high speed serial transceivers, and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via rugged high-speed stacking connections.

All this on a tiny footprint of 5.2 x 7.6 cm at the most competitive price. These high-density integrated modules are smaller than a credit card and available in several variants.

All parts are at least industrial temperature range of -40°C to +85°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.

Key Features

SoC/FPGA
- Device: AMD Zynq™ UltraScale+™ XCZU7EV-1FBVB900I
- Speedgrade: -1
- Temperature range: Industrial
- Package: FBVB900I
- Graphic Processing Unit (GPU) + Video codec unit (VCU)

RAM/Storage
- 4 GByte DDR4 SDRAM
- 128 MByte QSPI Boot Flash
- 2 Kbit MAC Adress serial EEPROM with EUI-48 Node Identity

On Board
- Oscillator

Interface
- 4 x B2B Connector (ADM6)
  - up to 204 PL IO
    - HP: 156
    - HD: 48
  - up to 65 PS MIO
  - 4 GTR
  - 16 GTH
  - I2C, JTAG
Power
- Power supply via B2B Connector needed
Dimension
- 5.2 x 7.6 cm

Other assembly options for cost or performance optimization plus high volume prices available on request.

Recommended Software

Vivado Standard Edition (free version)

The Vivado Standard Edition is the FREE version of the Vivado design suite. Vivado Standard delivers instant access to some basic Vivado features and functionality at no cost.

Overview Vivado Standard and Enterprise Edition

Development Support

There is a base board available for this module.

Latest documentation, design support files and reference designs with source files are available for download free of charge.

Scope of Delivery

1 x TE0817-02-7DI81-A Trenz Electronic MPSoC Module with AMD Zynq™ UltraScale+™ ZU07EV

Additional Information

Manufacturer's article number: TE0817-02-7DI81-A
Trenz Electronic TE0817 Wiki
Support Forum

All modules produced by Trenz Electronic are developed and manufactured in Germany.

Properties "MPSoC Module with AMD Zynq™ UltraScale+™ ZU7EV-1I, 4 GByte DDR4, 5.2 x 7.6 cm"

Properties

FPGA Manufacturer:	AMD
FPGA/SoC Architecture:	UltraScale+
FPGA/SoC Family:	Zynq
FPGA/SoC Type:	MPSoC
Form Factor:	5.2 × 7.6 cm

Data according to manufacturer. Errors and changes reserved.

Downloads

File	File-Extension	Description
Bit-File	*.bit	FPGA Configuration File
Diverse Reports	--	Report files in different formats

Component	Description
IP-Interfaces	I2C, ASIO (AXI-Stream to IO), SPI-Flash, Uart

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	I2C,SPI-Flash,UART
TE-IP	ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO
TE-IP	Startupe2,LabTools Frequency Counter

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Xilinx-IP	VIO (Virtual Input/Output)
TE-IP	Labtools Frequency Counter, Startupe2 Primitive Wrapper

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
Reference Design	Reference Designs sort by ISE/EDK Version
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Component	Description
Interface IPs	DDR3, GPIO, Uart0, QSPI and Ethernet

Application	Description
hello_world	Xilinx Hello World Example (.elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite
TE-IP	ASIO GPIO (AXI-Stream to GPIO)

Application	Description
Hello World	Xilinx Hello world ( generate elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO,ILA
TE-IP	unio_mac

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Interface IPs	QSPI, Uart, ASIO (Axi-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	ILA, VIO, CLK-Wizard
TE-IP	F32C, Vector_LED, UART_MON

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Component	Description
IP-Interfaces	DDR3, QSPI, Uart, I2C, Ethernet, ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite, VIO
TE-IP	ASIO (AXI-Stream to IO), labtools_fmeter

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
te_spi_bootloader	SPI Bootloader (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
memory_tests	Xilinx Memory Example (.elf only)

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems

Component	Description
Zynq Processor	activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C,2x SD,1x Ethernet

Digilent
OHO-Elektronik
Sundance
Trenz_Electronic - Documents and Design files for Trenz Electronic Products
inrevium
reference

TE0817 - 5.2 x 7.6 cm MPSoC module with Xilinx Zynq UltraScale+

5.2 x 7.6 Carriers - Wiki with TRM, reference projects, application notes and more
- TE0817 TRM - Technical Reference Manual
- TE0817 Reference Designs- Reference Design Description
- TE0817 Product Change Notifications - PCN (see also Schematic Change History and TRM)
- TE0817 Advisory Notes - Advisory Note
5.2 x 7.6 UltraSoM+ ADF6 and ADM6 B2B Connectors - overview, compatibility, mating heights and speed rating
5.2 x 7.6 UltraSoM+ ADF6/ADM6 Integration Guide - module and carrier board power connection, PCB Design notes and more
TEBF0818 Getting Started - Basic note to start up module with TEBF0818 carrier

5.6 x 7.6 Carrier

5.2 x 7.6 Carriers - overview of available carrier boards for all <size x> x <size y> cm <type> modules

Support

For support, please go to http://forum.trenz-electronic.de/ or contact support@trenz-electronic.de

Accessories

Heatsink SuperGrip for Trenz Electronic REV05 only, TE0817 and TE0818

High Performance maxiFLOW/superGRIP Heatsink, 31 x 31 x 17,5 mm, BGA Aluminium, top mounting

Article number: 29664

Stock: 10

From US$27.91

Details

Samtec ADF6 AcceleRate®High-Density 4-Row Socket, 240 Pins

ADF6-60-03.5-L-4-2-FR, 0.635 mm AcceleRate HD High-Density, 4-Row, 240 pins, slim body array

Article number: 31137

Stock: 652

From US$4.28

Details

Radian Sub-Zero PCIe Fansink - SZ12L, 50 x 64 x 10.5 mm, 12V

Active aluminum heat sink with integrated 12V fan

Article number: 33663

Stock: 0

From US$46.24

Details

Radian Sub-Zero PCIe Fansink - SZ5L, 50 x 64 x 10.5 mm, 5V

Active aluminum heat sink with integrated 5V fan

Article number: 33664

Stock: 23

From US$46.24

Details

Heat Spreader for Trenz Electronic MPSoC Module TE0817-02

Cooling solution especially desgined for Trenz Electronic MPSoC module TE0817-02

Article number: KK0817-02

Stock: 22

From US$27.91

Details

UltraITX+ Basisboard for Trenz Electronic TE081X UltraSOM+

Baseboard developed for Trenz Electronic TE0813, TE0817 and TE0818 UltraSOM+ MPSoC modules.

Article number: TEBF0818-02A

Stock: 0

US$617.61

Details

Application	Description
zynq_fsbl	Default Xilinx FSBL
u-boot	Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>)

Application	Description
zynq_fsbl	Zynq First Stage Bootloader (Modified)
hello_world	TE0720 Xilinx Hello World Example
u-boot	Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default)

Name	Folder	Description
Source Name	<design_name><folder>	Source Description
PetaLinux Project	<design_name>/os/petalinux	PetaLinux Project with Ethernet,USB,RTC

MPSoC Module with AMD Zynq™ UltraScale+™ ZU7EV-1I, 4 GByte DDR4, 5.2 x 7.6 cm

Product information "MPSoC Module with AMD Zynq™ UltraScale+™ ZU7EV-1I, 4 GByte DDR4, 5.2 x 7.6 cm"

Key Features

Recommended Software

Development Support

Scope of Delivery

Additional Information

Downloads

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